ROSE 0.11.145.192
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Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric Class Reference

Description

A RegisterState for any architecture.

This state stores a list of non-overlapping registers and their values, typically only for the registers that have been accessed. The state automatically switches between different representations when accessing a register that overlaps with one or more stored registers (see the accessModifiesExistingLocations and accessCreatesLocations properties). For instance, if the state stores 64-bit registers and the specimen suddently switches to 32-bit mode, this state will split the 64-bit registers into 32-bit pieces. If the analysis later returns to 64-bit mode, the 32-bit pieces are concatenated back to 64-bit values. This splitting and concatenation occurs on a per-register basis at the time the register is read or written.

The register state also stores optional information about writers for each register. Writer information (addresses of instructions that wrote to the register) are stored as sets defined at each bit of the register. This allows a wide register, like x86 RAX, to be written to in parts by different instructions, like x86 AL. The register state itself doesn't update this information automatically–it only provides the API by which a higher software layer can manipulate the information. This design allows the writer data structure to alternatively be used for things other than addresses of writing instructions. For instance, the SymbolicSemantics::RiscOperators has a setting that enables tracking writers.

Definition at line 38 of file RegisterStateGeneric.h.

#include <Rose/BinaryAnalysis/InstructionSemantics/BaseSemantics/RegisterStateGeneric.h>

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Classes

class  AccessCreatesLocationsGuard
 Guards whether access is able to create new locations. More...
 
class  AccessModifiesExistingLocationsGuard
 Guards whether access can change set of existing locations. More...
 
class  RegisterNotPresent
 Exception when register storage is not present. More...
 
struct  RegPair
 A register descriptor and its value. More...
 
struct  RegStore
 Register map keys. More...
 
class  Visitor
 Functors for traversing register values in a register state. More...
 

Public Types

using Super = RegisterState
 Base type.
 
using Ptr = RegisterStateGenericPtr
 Shared-ownership pointer.
 
using BitRange = Sawyer::Container::Interval< size_t >
 A range of bits indexes.
 
using RegPairs = std::vector< RegPair >
 Vector of register/value pairs.
 
using Registers = Sawyer::Container::Map< RegStore, RegPairs >
 Values for all registers.
 
using BitProperties = Sawyer::Container::IntervalSetMap< BitRange, InputOutputPropertySet >
 Boolean properties per bit.
 
using RegisterProperties = Sawyer::Container::Map< RegStore, BitProperties >
 Boolean properties for all registers.
 
using BitAddressSet = Sawyer::Container::IntervalSetMap< BitRange, AddressSet >
 Virtual addresses per bit.
 
using RegisterAddressSet = Sawyer::Container::Map< RegStore, BitAddressSet >
 Virtual addresses for all registers.
 
- Public Types inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterState
using Ptr = RegisterStatePtr
 Shared-ownership pointer.
 
- Public Types inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::AddressSpace
using Ptr = AddressSpacePtr
 Shared-ownership pointer.
 
using Purpose = AddressSpacePurpose
 Purpose for the address space.
 

Public Member Functions

virtual RegisterStatePtr create (const SValuePtr &protoval, const RegisterDictionaryPtr &) const override
 Virtual constructor.
 
virtual AddressSpacePtr clone () const override
 Deep-copy of this address space.
 
virtual void clear () override
 Removes stored values from the register state.
 
virtual void zero () override
 Set all registers to the zero.
 
virtual SValuePtr readRegister (RegisterDescriptor, const SValuePtr &dflt, RiscOperators *) override
 Read a value from a register.
 
virtual SValuePtr peekRegister (RegisterDescriptor, const SValuePtr &dflt, RiscOperators *) override
 Read a register without side effects.
 
virtual void writeRegister (RegisterDescriptor, const SValuePtr &value, RiscOperators *) override
 Write a value to a register.
 
virtual void print (std::ostream &, Formatter &) const override
 Print an address space.
 
virtual bool merge (const AddressSpacePtr &other, RiscOperators *addrOps, RiscOperators *valOps) override
 Merge address spaces for data flow analysis.
 
virtual void hash (Combinatorics::Hasher &, RiscOperators *addrOps, RiscOperators *valOps) const override
 Hash this address space.
 
virtual void initialize_large ()
 Initialize all registers of the dictionary.
 
virtual void initialize_small ()
 Initialize all registers of the dictionary.
 
void initialize_nonoverlapping (const std::vector< RegisterDescriptor > &, bool initialize_to_zero)
 Initialize the specified registers of the dictionary.
 
virtual RegPairs get_stored_registers () const
 Returns the list of all registers and their values.
 
virtual bool is_partly_stored (RegisterDescriptor) const
 Determines if some of the specified register is stored in the state.
 
virtual bool is_wholly_stored (RegisterDescriptor) const
 Determines if the specified register is wholly stored in the state.
 
virtual bool is_exactly_stored (RegisterDescriptor) const
 Determines if the specified register is stored exactly in the state.
 
virtual ExtentMap stored_parts (RegisterDescriptor) const
 Returns a description of which bits of a register are stored.
 
virtual RegPairs overlappingRegisters (RegisterDescriptor) const
 Find stored registers overlapping with specified register.
 
virtual void erase_register (RegisterDescriptor, RiscOperators *)
 Cause a register to not be stored.
 
virtual void traverse (Visitor &)
 Traverse register/value pairs.
 
virtual AddressSet getWritersUnion (RegisterDescriptor) const
 Get writer information.
 
virtual AddressSet getWritersIntersection (RegisterDescriptor) const
 Get writer information.
 
virtual bool insertWriters (RegisterDescriptor, const AddressSet &writerVas)
 Insert writer information.
 
virtual void eraseWriters (RegisterDescriptor, const AddressSet &writerVas)
 Erase specified writers.
 
virtual void setWriters (RegisterDescriptor, const AddressSet &writers)
 Set writer information.
 
virtual bool insertProperties (RegisterDescriptor, const InputOutputPropertySet &)
 Insert Boolean properties.
 
virtual bool eraseProperties (RegisterDescriptor, const InputOutputPropertySet &)
 Erase Boolean properties.
 
virtual void setProperties (RegisterDescriptor, const InputOutputPropertySet &)
 Assign property set.
 
virtual std::vector< RegisterDescriptorfindProperties (const InputOutputPropertySet &required, const InputOutputPropertySet &prohibited=InputOutputPropertySet()) const
 Get registers having certain properties.
 
virtual void updateWriteProperties (RegisterDescriptor, InputOutputProperty) override
 Update register properties after writing to a register.
 
virtual void updateReadProperties (RegisterDescriptor) override
 Update register properties after reading a register.
 
bool accessModifiesExistingLocations () const
 Property: Whether stored registers are adapted to access patterns.
 
virtual void accessModifiesExistingLocations (bool)
 Property: Whether stored registers are adapted to access patterns.
 
bool accessCreatesLocations () const
 Property: Whether access can create new locations.
 
virtual void accessCreatesLocations (bool)
 Property: Whether access can create new locations.
 
virtual bool hasWritersAny (RegisterDescriptor) const
 Whether a register has writers.
 
virtual bool hasWritersAll (RegisterDescriptor) const
 Whether a register has writers.
 
virtual void eraseWriters (RegisterDescriptor)
 Erase all writers.
 
virtual void eraseWriters ()
 Erase all writers.
 
virtual bool hasPropertyAny (RegisterDescriptor, InputOutputProperty) const
 Whether a register has the specified property.
 
virtual bool hasPropertyAll (RegisterDescriptor, InputOutputProperty) const
 Whether a register has the specified property.
 
virtual InputOutputPropertySet getPropertiesUnion (RegisterDescriptor) const
 Get properties.
 
virtual InputOutputPropertySet getPropertiesIntersection (RegisterDescriptor) const
 Get properties.
 
virtual void eraseProperties (RegisterDescriptor)
 Erase all Boolean properties.
 
virtual void eraseProperties ()
 Erase all Boolean properties.
 
- Public Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterState
SValuePtr protoval () const
 Return the protoval.
 
MergerPtr merger () const
 Property: Merger.
 
void merger (const MergerPtr &m)
 Property: Merger.
 
RegisterDictionaryPtr registerDictionary () const
 Property: Register dictionary.
 
void registerDictionary (const RegisterDictionaryPtr &)
 Property: Register dictionary.
 
- Public Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::AddressSpace
virtual SValuePtr read (const AddressSpaceAddress &, const SValuePtr &dflt, RiscOperators &addrOps, RiscOperators &valOps)
 Read a value from the address space.
 
virtual SValuePtr peek (const AddressSpaceAddress &, const SValuePtr &dflt, RiscOperators &addrOps, RiscOperators &valOps)
 Read without causing side effects.
 
virtual void write (const AddressSpaceAddress &, const SValuePtr &value, RiscOperators &addrOps, RiscOperators &valOps)
 Write a value to an address space.
 
std::string printableName () const
 Printable name for this address space.
 
Purpose purpose () const
 Property: Purpose of this address space.
 
void purpose (Purpose)
 Property: Purpose of this address space.
 
const std::string & name () const
 Property: Name for this address space.
 
void name (const std::string &)
 Property: Name for this address space.
 
void print (std::ostream &, const std::string &prefix="") const
 Print an address space.
 
WithFormatter with_format (Formatter &)
 Used for printing address spaces with formatting.
 
WithFormatter operator+ (Formatter &)
 Used for printing address spaces with formatting.
 
WithFormatter operator+ (const std::string &linePrefix)
 Used for printing address spaces with formatting.
 

Static Public Member Functions

static RegisterStateGenericPtr instance (const SValuePtr &protoval, const RegisterDictionaryPtr &)
 Instantiate a new register state.
 
static RegisterStateGenericPtr instance (const RegisterStateGenericPtr &other)
 Instantiate a new copy of an existing register state.
 
static RegisterStateGenericPtr promote (const AddressSpacePtr &from)
 Run-time promotion of a base address space pointer to a RegisterStateGeneric pointer.
 
- Static Public Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterState
static RegisterStatePtr promote (const AddressSpacePtr &)
 

Protected Member Functions

 RegisterStateGeneric (const SValuePtr &protoval, const RegisterDictionaryPtr &)
 
 RegisterStateGeneric (const RegisterStateGeneric &)
 
void deep_copy_values ()
 
void scanAccessedLocations (RegisterDescriptor reg, RiscOperators *ops, RegPairs &accessedParts, RegPairs &preservedParts) const
 
void clearOverlappingLocations (RegisterDescriptor)
 
void assertStorageConditions (const std::string &where, RegisterDescriptor what) const
 
- Protected Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterState
 RegisterState (const SValuePtr &protoval, const RegisterDictionaryPtr &regdict)
 
- Protected Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::AddressSpace
 AddressSpace (Purpose, const std::string &name)
 
 AddressSpace (const AddressSpace &)
 
AddressSpaceoperator= (const AddressSpace &)=delete
 

Protected Attributes

Registers registers_
 Values for registers that have been accessed.
 
- Protected Attributes inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterState
RegisterDictionaryPtr regdict
 Registers that are able to be stored by this state.
 

Member Typedef Documentation

◆ Super

Base type.

Definition at line 44 of file RegisterStateGeneric.h.

◆ Ptr

Shared-ownership pointer.

Definition at line 47 of file RegisterStateGeneric.h.

◆ BitRange

A range of bits indexes.

Represents of contiguous interval of bit indexes, such as all bits numbered zero through 15, inclusive.

Definition at line 62 of file RegisterStateGeneric.h.

◆ RegPairs

Vector of register/value pairs.

Definition at line 120 of file RegisterStateGeneric.h.

◆ Registers

Values for all registers.

Definition at line 123 of file RegisterStateGeneric.h.

◆ BitProperties

Boolean properties per bit.

This container stores properties per bit of a major/minor register pair. For instance, the x86 16-bit AX register might have different sets of properties for its different subregisters, AL and AH. This container stores those sets per bit.

Definition at line 135 of file RegisterStateGeneric.h.

◆ RegisterProperties

Boolean properties for all registers.

This container is indexed by register major/minor pair, then by a bit number, and stores a set of properties.

Definition at line 140 of file RegisterStateGeneric.h.

◆ BitAddressSet

Virtual addresses per bit.

Definition at line 148 of file RegisterStateGeneric.h.

◆ RegisterAddressSet

Virtual addresses for all registers.

Definition at line 151 of file RegisterStateGeneric.h.

Member Function Documentation

◆ instance()

static RegisterStateGenericPtr Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::instance ( const SValuePtr protoval,
const RegisterDictionaryPtr  
)
static

Instantiate a new register state.

The protoval argument must be a non-null pointer to a semantic value which will be used only to create additional instances of the value via its virtual constructors. The prototypical value is normally of the same type for all parts of a semantic analysis: its state and operator classes.

The register dictionary, regdict, describes the registers that can be stored by this register state, and should be compatible with the register dictionary used for other parts of binary analysis.

◆ create()

virtual RegisterStatePtr Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::create ( const SValuePtr protoval,
const RegisterDictionaryPtr regdict 
) const
overridevirtual

Virtual constructor.

The protoval argument must be a non-null pointer to a semantic value which will be used only to create additional instances of the value via its virtual constructors. The prototypical value is normally of the same type for all parts of a semantic analysis. The register state must be compatible with the rest of the binary analysis objects in use.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterState.

◆ clone()

virtual AddressSpacePtr Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::clone ( ) const
overridevirtual

◆ promote()

static RegisterStateGenericPtr Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::promote ( const AddressSpacePtr from)
static

Run-time promotion of a base address space pointer to a RegisterStateGeneric pointer.

This is a checked conversion–it will fail if from does not point to a RegisterStateGeneric object.

◆ accessModifiesExistingLocations() [1/2]

bool Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::accessModifiesExistingLocations ( ) const

Property: Whether stored registers are adapted to access patterns.

When accessing an existing register for read or write, the register state can adapt the list of existing storage locations to match the access pattern. For instance, accessing the middle of a register could split the register into three storage locations or leave it as one. Similarly accessing a register that spans two or more storage locations could either concatenate them into one location or leave them separate.

When this property is true then existing storage locations can be modified, otherwise extra steps are taken to preserve the list of storage locations.

This property applies only to readRegister and writeRegister and not to those methods that are not typically called as part of processing instruction semantics.

◆ accessModifiesExistingLocations() [2/2]

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::accessModifiesExistingLocations ( bool  )
virtual

Property: Whether stored registers are adapted to access patterns.

When accessing an existing register for read or write, the register state can adapt the list of existing storage locations to match the access pattern. For instance, accessing the middle of a register could split the register into three storage locations or leave it as one. Similarly accessing a register that spans two or more storage locations could either concatenate them into one location or leave them separate.

When this property is true then existing storage locations can be modified, otherwise extra steps are taken to preserve the list of storage locations.

This property applies only to readRegister and writeRegister and not to those methods that are not typically called as part of processing instruction semantics.

◆ accessCreatesLocations() [1/2]

bool Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::accessCreatesLocations ( ) const

Property: Whether access can create new locations.

This property controls what happens if some part of a register is accessed that isn't stored in the state. If the property is true then that part of the register springs into existence, otherwise an RegisterNotPresent exception is thrown.

◆ accessCreatesLocations() [2/2]

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::accessCreatesLocations ( bool  )
virtual

Property: Whether access can create new locations.

This property controls what happens if some part of a register is accessed that isn't stored in the state. If the property is true then that part of the register springs into existence, otherwise an RegisterNotPresent exception is thrown.

◆ clear()

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::clear ( )
overridevirtual

Removes stored values from the register state.

Depending on the register state implementation, this could either store new, distinct undefined values in each register, or it could simply erase all information about stored values leaving the register state truly empty. For instance RegisterStateGeneric, which uses variable length arrays to store information about a dynamically changing set of registers, clears its arrays to zero length.

Register states can also be initialized by clearing them or by explicitly writing new values into each desired register (or both). See BaseSemantics::RegisterStateGeneric::initialize_nonoverlapping for one way to initialize that register state.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterState.

◆ zero()

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::zero ( )
overridevirtual

◆ readRegister()

virtual SValuePtr Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::readRegister ( RegisterDescriptor  reg,
const SValuePtr dflt,
RiscOperators ops 
)
overridevirtual

Read a value from a register.

The register descriptor, reg, not only describes which register, but also which bits of that register (e.g., "al", "ah", "ax", "eax", and "rax" are all the same hardware register on an amd64, but refer to different parts of that register). The RISC operations are provided so that they can be used to extract the correct bits from a wider hardware register if necessary.

The dflt value is written into the register state if the register was not defined in the state. By doing this, a subsequent read of the same register will return the same value. Some register states cannot distinguish between a register that was never accessed and a register that was only read, in which case dflt is not used since all registers are already initialized.

See BaseSemantics::RiscOperators::readRegister for more details.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterState.

◆ peekRegister()

virtual SValuePtr Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::peekRegister ( RegisterDescriptor  reg,
const SValuePtr dflt,
RiscOperators ops 
)
overridevirtual

Read a register without side effects.

This is similar to readRegister except it doesn't modify the register state in any way.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterState.

◆ writeRegister()

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::writeRegister ( RegisterDescriptor  reg,
const SValuePtr value,
RiscOperators ops 
)
overridevirtual

Write a value to a register.

The register descriptor, reg, not only describes which register, but also which bits of that register (e.g., "al", "ah", "ax", "eax", and "rax" are all the same hardware register on an amd64, but refer to different parts of that register). The RISC operations are provided so that they can be used to insert the value bits into a wider the hardware register if necessary. See BaseSemantics::RiscOperators::readRegister for more details.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterState.

◆ print()

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::print ( std::ostream &  ,
Formatter  
) const
overridevirtual

Print an address space.

The output most likely occupies more than one line and each emitted line will be terminated with a line feed.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::AddressSpace.

◆ merge()

virtual bool Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::merge ( const AddressSpacePtr other,
RiscOperators addrOps,
RiscOperators valOps 
)
overridevirtual

Merge address spaces for data flow analysis.

Merges the other address space into this address space, returning true if this space changed.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::AddressSpace.

◆ hash()

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::hash ( Combinatorics::Hasher ,
RiscOperators addrOps,
RiscOperators valOps 
) const
overridevirtual

Hash this address space.

Hashes this address space by appending its data to the specified hasher. The goal is to identify when two address spaces are the "same" and allow certain kinds of analyses to take shortcuts. The address space purpose and name are not included in the hash. Separate RISC operators are passed for the addresses and values of this address space and are used if the hashing requires any operations on the addresses or values.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::AddressSpace.

◆ initialize_large()

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::initialize_large ( )
virtual

Initialize all registers of the dictionary.

When the dictionary contains overlapping registers, only the largest registers are initialized. For example, on a 32-bit x86 architecture EAX would be initialized but not AX, AH, or AL; requesting AX, AH, or AL will return part of the initial EAX value.

◆ initialize_small()

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::initialize_small ( )
virtual

Initialize all registers of the dictionary.

When the dictionary contains overlapping registers, only the smallest registers are initialized. For example, on a 32-bit x86 architecture, AX, AH, AL and the non-named high-order 16 bits of AX are inititialized, but EAX isn't explicitly initialized. Requesting the value of EAX will return a value constructed from the various smaller parts.

◆ initialize_nonoverlapping()

void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::initialize_nonoverlapping ( const std::vector< RegisterDescriptor > &  ,
bool  initialize_to_zero 
)

Initialize the specified registers of the dictionary.

Each register in the list must not overlap with any other register in the list, or strange things will happen. If initialize_to_zero is set then the specified registers are initialized to zero, otherwise they're initialized with the prototypical value's constructor that takes only a size parameter. This method is somewhat low level and doesn't do much error checking.

◆ get_stored_registers()

virtual RegPairs Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::get_stored_registers ( ) const
virtual

Returns the list of all registers and their values.

The returned registers are guaranteed to be non-overlapping, although they might not correspond to actual named machine registers. For instance, if a 32-bit value was written to the x86 EFLAGS register then the return value will contain a register/value pair for EFLAGS but no pairs for individual flags. If one subsequently writes a 1-bit value to the ZF flag (bit 6 of EFLAGS) then the return value will contain a register/value pair for ZF, and also a pair for bits 0-5, and a pair for bits 7-31, neither of which correspond to actual register names in x86 (there is no name for bits 0-5 as a whole). The readRegister and writeRegister methods can be used to re-cast the various pairs into other groupings; get_stored_registers is a lower-level interface.

◆ is_partly_stored()

virtual bool Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::is_partly_stored ( RegisterDescriptor  ) const
virtual

Determines if some of the specified register is stored in the state.

Returns true even if only part of the requested register is in the state (as when one asks about EAX and the state only stores AX). This is slightly more efficient than calling stored_parts():

assert(rstate->partly_exists(reg) == !parts_exist(reg).empty());
Describes (part of) a physical CPU register.
boost::shared_ptr< class RegisterStateGeneric > RegisterStateGenericPtr
Shared-ownership pointer to generic register states.

◆ is_wholly_stored()

virtual bool Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::is_wholly_stored ( RegisterDescriptor  ) const
virtual

Determines if the specified register is wholly stored in the state.

Returns if the state contains data for the entire register, even if that data is split among several smaller parts or exists as a subset of a larger part.

◆ is_exactly_stored()

virtual bool Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::is_exactly_stored ( RegisterDescriptor  ) const
virtual

Determines if the specified register is stored exactly in the state.

Returns true only if the specified register wholly exists and a value can be returned without extracting or concatenating values from larger or smaller stored parts. Note that a value can also be returned without extracting or conctenating if the state contains no data for the specified register, as indicated by is_partly_stored() returning false.

◆ stored_parts()

virtual ExtentMap Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::stored_parts ( RegisterDescriptor  ) const
virtual

Returns a description of which bits of a register are stored.

The return value is an ExtentMap that contains the bits that are stored in the state. This does not return the value of any parts of stored registers–one gets that with readRegister. The return value does not contain any bits that are not part of the specified register.

◆ overlappingRegisters()

virtual RegPairs Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::overlappingRegisters ( RegisterDescriptor  ) const
virtual

Find stored registers overlapping with specified register.

Returns all stored registers that overlap with the specified register. The registers in the returned vector will never overlap with each other, but they will all overlap with the specified register.

◆ erase_register()

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::erase_register ( RegisterDescriptor  ,
RiscOperators  
)
virtual

Cause a register to not be stored.

Erases all record of the specified register. The RiscOperators pointer is used for its extract operation if the specified register is not exactly stored in the state, such as if the state stores RIP and one wants to erase only the 32-bits overlapping with EIP.

◆ traverse()

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::traverse ( Visitor )
virtual

Traverse register/value pairs.

Traverses all the (non-overlapping) registers and their values, calling the specified functor for each register/value pair. If the functor returns a new SValue then the return value becomes the new value for that register. The new value must have the same width as the register.

For example, the following code performs a symbolic substitution across all the registers:

Substitution(const SymbolicSemantics::SValuePtr &from, const SymbolicSemantics::SValuePtr &to)
: from(from), to(to) {}
SymbolicSemantics::SValuePtr val = SymbolicSemantics::SValue::promote(val_);
return val->substitute(from, to);
}
};
SymbolicSemantics::SValuePtr original_esp = ...;
SymbolicSemantics::SValuePtr fp = ...; // the frame pointer in terms of original_esp
Substitution subst(original_esp, fp);
std::cerr <<*regs; // register values before substitution
regs->traverse(subst);
std::cerr <<*regs; // all original_esp have been replaced by fp
Reference-counting intrusive smart pointer.
Sawyer::SharedPointer< class SValue > SValuePtr
Shared-ownership pointer for symbolic semantic value.

As with most ROSE and STL traversals, the Visitor is not allowed to modify the structure of the object over which it is traversing. In other words, it's permissible to change the values pointed to by the state, but it is not permissible to perform any operation that might change the list of register parts by adding, removing, or combining parts. This includes calling readRegister and writeRegister except when the register being read or written is already exactly stored in the state as indicated by is_exactly_stored.

◆ hasWritersAny()

virtual bool Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::hasWritersAny ( RegisterDescriptor  ) const
virtual

Whether a register has writers.

Returns true if the specified register has writers. The "Any" version returns true if any bits of the register have writers, and the "All" version returns true if all bits of the register have writers (but not necessarily all the same writer).

◆ hasWritersAll()

virtual bool Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::hasWritersAll ( RegisterDescriptor  ) const
virtual

Whether a register has writers.

Returns true if the specified register has writers. The "Any" version returns true if any bits of the register have writers, and the "All" version returns true if all bits of the register have writers (but not necessarily all the same writer).

◆ getWritersUnion()

virtual AddressSet Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::getWritersUnion ( RegisterDescriptor  ) const
virtual

Get writer information.

Returns all instruction addresses that have written to at least part of the specified register. For instance, if instruction 0x1234 and 0x4321 wrote to AL and instruction 0x5678 wrote to AH then this method would return the set {0x1234, 0x4321, 0x5678} as the writers of AX.

◆ getWritersIntersection()

virtual AddressSet Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::getWritersIntersection ( RegisterDescriptor  ) const
virtual

Get writer information.

Returns the set of instruction addresses that have written to the entire specified register. For instance, if instruction 0x1234 and 0x4321 wrote to AL and instructions 0x1234 and 0x5678 wrote to AH then this method will return the set {0x1234} as the writers of AX.

◆ insertWriters()

virtual bool Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::insertWriters ( RegisterDescriptor  ,
const AddressSet writerVas 
)
virtual

Insert writer information.

Adds the specified instruction addresses as writers of the specified register. Any previously existing writer addresses are not affected. Returns true if any addresses were inserted, false if they all already existed. A single writer address can also be specified due to the AddressSet implicit constructor.

◆ eraseWriters() [1/3]

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::eraseWriters ( RegisterDescriptor  ,
const AddressSet writerVas 
)
virtual

Erase specified writers.

Removes the specified addresses from the set of writers for the register without affecting other addresses that might also be present. Returns true if none of the writer addresses existed, false if any were removed. A single writer address can also be specified due to the AddressSet implicit constructor.

◆ setWriters()

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::setWriters ( RegisterDescriptor  ,
const AddressSet writers 
)
virtual

Set writer information.

Changes the writer information to be exactly the specified address or set of addresses. A single writer address can also be specified due to the AddressSet implicit constructor.

◆ eraseWriters() [2/3]

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::eraseWriters ( RegisterDescriptor  )
virtual

Erase all writers.

If a register descriptor is provided then all writers are removed for that register only. Otherwise all writers are removed for all registers.

◆ eraseWriters() [3/3]

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::eraseWriters ( )
virtual

Erase all writers.

If a register descriptor is provided then all writers are removed for that register only. Otherwise all writers are removed for all registers.

◆ hasPropertyAny()

virtual bool Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::hasPropertyAny ( RegisterDescriptor  ,
InputOutputProperty   
) const
virtual

Whether a register has the specified property.

Returns true if the register has the specified property. The "Any" version returns true if any bits of the register have the property, while the "All" version returns true if all bits of the register have the property.

◆ hasPropertyAll()

virtual bool Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::hasPropertyAll ( RegisterDescriptor  ,
InputOutputProperty   
) const
virtual

Whether a register has the specified property.

Returns true if the register has the specified property. The "Any" version returns true if any bits of the register have the property, while the "All" version returns true if all bits of the register have the property.

◆ getPropertiesUnion()

virtual InputOutputPropertySet Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::getPropertiesUnion ( RegisterDescriptor  ) const
virtual

Get properties.

Returns the Boolean properties associated with the specified register. The "Union" version returns the union of the properties across all bits of the register, while the "Intersection" version returns the set of properties that are defined for all bits of the register.

◆ getPropertiesIntersection()

virtual InputOutputPropertySet Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::getPropertiesIntersection ( RegisterDescriptor  ) const
virtual

Get properties.

Returns the Boolean properties associated with the specified register. The "Union" version returns the union of the properties across all bits of the register, while the "Intersection" version returns the set of properties that are defined for all bits of the register.

◆ insertProperties()

virtual bool Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::insertProperties ( RegisterDescriptor  ,
const InputOutputPropertySet  
)
virtual

Insert Boolean properties.

Inserts the specified properties for all bits of the specified register without affecting any other properties. Returns true if a property was inserted anywhere, false if all specified properties already existed everywhere in the specified register. A single property can also be specified due to the RegisterProperties implicit constructor.

◆ eraseProperties() [1/3]

virtual bool Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::eraseProperties ( RegisterDescriptor  ,
const InputOutputPropertySet  
)
virtual

Erase Boolean properties.

Removes the speciied properties from the specified register. Returns true if any of the properties were erased, false if none of them already existed. A single property can also be specified due to the RegisterProperties implicit constructor.

◆ setProperties()

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::setProperties ( RegisterDescriptor  ,
const InputOutputPropertySet  
)
virtual

Assign property set.

Assigns the specified property set (or single property) to the specified register. The register will then contain only those specified properties.

◆ eraseProperties() [2/3]

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::eraseProperties ( RegisterDescriptor  )
virtual

Erase all Boolean properties.

Removes all properties from the specified register (or all registers).

◆ eraseProperties() [3/3]

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::eraseProperties ( )
virtual

Erase all Boolean properties.

Removes all properties from the specified register (or all registers).

◆ findProperties()

virtual std::vector< RegisterDescriptor > Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::findProperties ( const InputOutputPropertySet required,
const InputOutputPropertySet prohibited = InputOutputPropertySet() 
) const
virtual

Get registers having certain properties.

Return a list of registers that have the required properties and lack the prohibited properties. The returned list contains the largest registers that satisfy the conditions.

◆ updateWriteProperties()

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::updateWriteProperties ( RegisterDescriptor  ,
InputOutputProperty   
)
overridevirtual

Update register properties after writing to a register.

This should be called by all implementations of BaseSemantics::RiscOperators::writeRegister. Depending on the domain, it usually adds the WRITE or INIT property to the bits of the rgister.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterState.

◆ updateReadProperties()

virtual void Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::updateReadProperties ( RegisterDescriptor  )
overridevirtual

Update register properties after reading a register.

This should be called by all implementations of BaseSemantics::RiscOperators::readRegister. Depending on the semantic domain, it usually adds the READ property to all bits of the register, and conditionally adds READ_BEFORE_WRITE and/or READ_UNINITIALIZED properties to parts of the register.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterState.

Member Data Documentation

◆ registers_

Registers Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RegisterStateGeneric::registers_
protected

Values for registers that have been accessed.

This is a map whose keys are major/minor pairs and whose values are IntervalSetMaps that associate a value with non-overlapping ranges of bits. When reading or writing a register, the register being accessed is guaranteed to overlap only with those registers on the matching major-minor list, if it overlaps at all. The lists are typically short (e.g., one list might refer to all the parts of the x86 RAX register, but the RBX parts would be on a different list. None of the registers stored on a particular list overlap with any other register on that same list; when adding new register that would overlap, the registers with which it overlaps must be removed first.

Definition at line 172 of file RegisterStateGeneric.h.


The documentation for this class was generated from the following file: