ROSE 0.11.145.192
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Rose::BinaryAnalysis Namespace Reference

Description

Binary analysis.

This namespace contains ROSE binary analysis features, such as the ability to parse file formats like ELF and PE; to disassemble machine instructions and byte code and organize them into basic blocks and functions; to analyze code in architecture independent ways, to generate pseudo-assembly listings, and more.

Background

ROSE was originally designed as a source-to-source compiler for analyzing and transforming C source code in an HPC environment. Later, more source languages like Fortran, C++, C#, Java, Cuda, OpenCL, PHP, Python, Ada, and Jovial were added. At some point along the line, it was observed that analyzing and transforming binary executables could use much of the same mechanisms as source code: parsing of container formats like ELF and PE, representing instructions and static data as an abstract syntax tree; describing the runtime semantics of instructions; analyzing an intermediate representation (IR) of a specimen; transforming the IR; and unparsing the IR as a new specimen or as assembly language.

Of course there are also many differences between binary code and source code, but ROSE is situated in the unique position of being able to process both. On the one hand, it can operate on a binary specimen for which no source code is available, and on the other hand it can perform analysis and transformations where both source and binary are available.

Feature Set

ROSE can parse a variety of binary inputs. It can parse executable formats such as Linux ELF executables, shared libraries, core dumps, object files, and library archives; and Microsoft Windows PE and DOS executables and libraries. It can parse memory initialization formats such as Motorola S-Records, Intel HEX files, and raw memory dumps. It can analyze running or paused programs on Linux. ROSE can also analyze combinations of these formats, such as an ELF file extended by providing additional initialized memory from an S-Record file. It has a mini command-line language for specifying this for all binary analysis tools. For a full list, see the man pages generated by any binary analysis tool. The analyzable data from the binary specimens are loaded into a memory map, which is able to represent an entire address space.

ROSE has instruction decoders that decode single binary machine instructions into abstract syntax trees (ASTs). ROSE supports ARM, AMD64 (x86_64), Intel x86, MIPS, Motorola 68k, PowerPC (32- and 64-bit), Java byte code, common intermediate language (CIL), user-defined instruction sets, and more. To get a full list, use the "--isa=list" argument supported by most ROSE binary analysis tools.

The ROSE partitioner (the layer responsible for partitioning memory into instructions and static data and then organizing those instructions into basic blocks and functions) uses a hybrid linear sweep and recursive descent approach that handles things like overlapping instructions (on architectures where that's possible), interleaved functions, rewritten execution flow, and more. ROSE supports multiple approaches for partitioning: the Partitioner2::Partitioner object holds the results of partitioning and is what most analyses query, and the different approaches to building these objects are implemented in various subclasses of Partitioner2::Engine. For instance, partitioning an ELF x86 binary is very different than partioning a Java class file–the former is undecidable while the latter is well specified.

In addition to being able to decode instructions, ROSE understands how instructions operate, i.e., their semantics. This layer lowers machine instructions to a few dozen RISC-like operations. ROSE's semantics are implemented in extensible C++ classes rather than a domain-specific language, and this enables the semantics to be specialized for various situations. For instance, the same API is used for both concrete emulation and symbolic execution, and is specialized in other places to do interval analysis, tainted flow analysis, feasible path analysis, model checking, etc. Some of the semantic domains (those derived from the symbolic semantics) can interface directly with SMT solvers. ROSE's hardware models are generally simplifications in order to make analysis more tractable, so not all aspects of every instruction are accurately modeled. Fortunately, users can extend this layer in order to design and use more accurate machine models.

ROSE is designed so that most analysis is architecture independent. The architecture layer describes the architectures in ways that other analysis components can understand. This layer describes such things as registers and calling-conventions, but also points to the architecture's instruction decoders, instruction semantics, control flow information, and unparsers. Users can define new architectures by registering their own classes with the ROSE library at runtime: either in their own tools via an architecture registration API, or for any ROSE binary analysis tool by specifing an architecture shared library with the "--architectures" command-line switch.

ROSE uses a unified assembly language common across all architectures in order to aid human understanding. The process of transcoding from an AST to an assembly listing is called "unparsing" in ROSE, and the binary analysis unparser is highly configurable and extensible. The assembly listings produced by most binary analysis tools typically include information about functions, basic blocks, addresses, the machine instruction bytes, information about stack behavior, the instruction mnemonic and its operands, and comments describing what the instruction does. Operands use infix C-like arithmetic operators rather than architecture-specific representations of addressing modes. In the simplest case, for any instruction you can say `insn->toString()`.

A number of binary analysis tools are distributed with the open-source ROSE library. Additional tools are potentially available from other repositories and have various (usually more restrictive) release and licensing requirements. Contact the ROSE team for more information about these other tools.

Configuration

In order to support binary analysis, ROSE needs to be configured for binary analysis during build time. See documentation concerning ROSE's various build systems for details.

A number of optional supporting libraries can be configured, and the binary analysis capabilities in ROSE will be adjusted based on what software is available at build time. The binary analysis tools distributed with ROSE have a --version-long switch that will display the features that are enabled. For example:

$ bat-ana --version-long
ROSE 0.11.145.11 (configured Wed Dec 13 10:00:00 2023 -0800)
--- logic assertions: disabled
--- boost library: 1.80.0
--- readline library: unused
--- C/C++ analysis: disabled
--- Fortran analysis: disabled
--- binary analysis: enabled
--- object serialization: enabled
--- ARM AArch32 (A32/T32): enabled
--- ARM AArch64 (A64): enabled
--- MIPS (be and le): enabled
--- Motorola m68k (coldfire): enabled
--- PowerPC (be and le): enabled
--- Intel x86 (i386): enabled
--- Intel x86-64 (amd64): enabled
--- concolic testing: enabled
--- Linux PTRACE debugging enabled
--- GDB debugger interface enabled
--- fast lib identification enabled
--- model checking enabled
--- capstone library: 4.0.2
--- dlib library: 19.19.0
--- gcrypt library: 1.8.5
--- magic numbers library: unused
--- pqxx library: unused
--- sqlite library: 3.31.1
--- yaml-cpp library: unused
--- z3 library: 4.12.2.0
--- Ada analysis: disabled
--- C# analysis: disabled
--- CUDA analysis: disabled
--- Java analysis: disabled
--- Jovial analysis: disabled
--- Matlab analysis: disabled
--- OpenCL analysis: disabled
--- PHP analysis: disabled
--- Python analysis: disabled

Example tool

The binary analysis capabilities can be demonstrated by writing a simple example program that will read a specimen and create a human-readable pseudo-disassembly. This example will also demonstrate:

Header files

ROSE header files follow these design principles:

Note
ROSE has not always followed these principles and therefore has legacy header files that violate them. None of these headers have paths that start with "Rose", and most of them are included with no path at all (or perhaps just lower-case "rose", depending on the build system and how ROSE was installed). One of these legacy headers is "rose.h". It was once necessary to include "rose.h" before any other header files, but this requirement has been relaxed for most headers under the "Rose" directory and all Sage "SgAsm*.h" headers for AST node types. If you get strange compile errors for things you don't think you're using, try adding #include <rose.h> to the top of your source code.

Namespaces

It is customary to have C++ directives to help reduce the amount of typing for deeply nested ROSE data structures. This example will try to strike a balance between minimizing typing and using qualified names to help document the code for newcomers.

Namely, we will bring Rose::BinaryAnalysis into scope for the entire compilation unit as well as Sawyer::Message::Common. The latter provides (among other things) the diagnostic message severity levels like FATAL, ERROR, WARN, INFO, and others. In addition, we abbreviate "Partitioner2" to just "P2" as is customary in many existing binary analysis tools.

Diagnostics

ROSE has a subsystem for emitting diagnostic messages and progress bars based on Sawyer::Message. In short, line-oriented text messages are sent to streams (subclass of std::ostream) of various severity levels ranging in severity from debug messages to fatal messages. Streams for the severity levels are organized into facilities, one facility per ROSE component. For instance, the various debuggers all share one facility. The facilities are collected into one encompassing Sawyer::Message::Facilities object from which they can all be controlled.

Note
Facilities in ROSE are usually named mlog so that at any point in ROSE the name mlog refers to the inner, most-specific facility according to the usual C++ name resolution rules.

Our example tool creates a message facility named mlog at file scope.

A diagnostic message facility needs to be initialized at runtime, which we do near the top of our main function. In fact, the ROSE library itself needs to also be initialized, and we use the ROSE_INITIALIZE macro for this which also checks certain things, like that the ROSE header files that have been included match the version used to compiled the ROSE library (to adhere to the C++ ODR).

Individual streams can be turned on or off in source code with their enable functions. The ROSE binary analysis tools also have a "--log" switch to query and control the various streams. To get started, use "--log=help". For example, here's our example tool listing all known diagnostic facilities and what streams within each facility are enabled (our own tool's facility is listed last):

$ ./example --log=list
Logging facilities status
Letters indicate a stream that is enabled; hyphens indicate disabled.
D=debug, T=trace, H=where, M=march, I=info, W=warning, E=error, F=fatal
---MIWEF default enabled levels
---MIWEF Rose -- top-level ROSE diagnostics
---MIWEF Rose::BinaryAnalysis::Architecture -- defining hardware architectures
---MIWEF Rose::BinaryAnalysis::Ast -- operating on binary abstract syntax trees
---MIWEF Rose::BinaryAnalysis::BestMapAddress -- computing mem mapping based on insns
---MIWEF Rose::BinaryAnalysis::BinaryLoader -- mapping files into virtual memory
---MIWEF Rose::BinaryAnalysis::BinaryToSource -- lifting assembly to C
---MIWEF Rose::BinaryAnalysis::CallingConvention -- computing function calling conventions
---MIWEF Rose::BinaryAnalysis::CodeInserter -- inserting code into an existing specimen
---MIWEF Rose::BinaryAnalysis::Concolic -- concolic testing
---MIWEF Rose::BinaryAnalysis::DataFlow -- solving data-flow analysis problems
---MIWEF Rose::BinaryAnalysis::Debugger -- debugging other processes
---MIWEF Rose::BinaryAnalysis::Disassembler -- decoding machine language instructions
---MIWEF Rose::BinaryAnalysis::Dwarf -- parsing DWARF debug information
---MIWEF Rose::BinaryAnalysis::FeasiblePath -- model checking and path feasibility
---MIWEF Rose::BinaryAnalysis::FunctionSimilarity -- matching function pairs based on similarity
---MIWEF Rose::BinaryAnalysis::HotPatch -- semantic hot patching
---MIWEF Rose::BinaryAnalysis::InstructionSemantics -- evaluating instructions based on their behaviors
---MIWEF Rose::BinaryAnalysis::LibraryIdentification -- fast library identification and recognition (FLIR)
---MIWEF Rose::BinaryAnalysis::ModelChecker -- model checking
---MIWEF Rose::BinaryAnalysis::NoOperation -- determining insn sequences having no effect
---MIWEF Rose::BinaryAnalysis::Partitioner2 -- partitioning insns to basic blocks and functions
---MIWEF Rose::BinaryAnalysis::PointerDetection -- finding pointers to code and data
---MIWEF Rose::BinaryAnalysis::Reachability -- propagating reachability through a CFG
---MIWEF Rose::BinaryAnalysis::ReturnValueUsed -- determining whether a return value is used
---MIWEF Rose::BinaryAnalysis::SerialIo -- reading/writing serialized analysis states
---MIWEF Rose::BinaryAnalysis::SmtSolver -- invoking a satisfiability modulo theory solver
---MIWEF Rose::BinaryAnalysis::StackDelta -- analyzing stack pointer behavior
---MIWEF Rose::BinaryAnalysis::Strings -- detecting string constants
---MIWEF Rose::BinaryAnalysis::SymbolicExpressionParser -- parsing symbolic expressions
---MIWEF Rose::BinaryAnalysis::TaintedFlow -- analyzing based on tainted-flow
---MIWEF Rose::BinaryAnalysis::Unparser -- generating assembly listings (vers 2)
---MIWEF Rose::BinaryAnalysis::Variables -- local and global variable detection
---MIWEF Rose::BinaryAnalysis::VxcoreParser -- parsing and unparsing vxcore format
---MIWEF Rose::EditDistance -- measuring differences using edit distance
---MIWEF Rose::FixupAstDeclarationScope -- normalizing AST declarations
---MIWEF Rose::FixupAstSymbolTablesToSupportAliasedSymbols -- normalizing symbol tables for aliased symbols
---MIWEF Rose::SageBuilder -- building abstract syntax trees
---MIWEF Rose::TestChildPointersInMemoryPool -- testing AST child pointers in memory pools
---MIWEF Rose::UnparseLanguageIndependentConstructs -- generating source code for language-indepentend constructs
---MIWEF rose_ir_node -- operating on ROSE internal representation nodes
-----WEF sawyer -- Sawyer C++ support library
---MIWEF tool -- binary analysis tutorial

If we wanted to enable all diagnostic output from our tool, and only errors and fatal diagnostics from the rest of ROSE, we could invoke our tool like this, which first disables all streams, then enables those for errors and greater, and finally enables all streams for our tool facility. By appending "--log=list" we can see the affect this has:

$ ./example --log='none,>=error,tool(all)' --log=list
Logging facilities status
Letters indicate a stream that is enabled; hyphens indicate disabled.
D=debug, T=trace, H=where, M=march, I=info, W=warning, E=error, F=fatal
------EF default enabled levels
------EF Rose -- top-level ROSE diagnostics
------EF Rose::BinaryAnalysis::Architecture -- defining hardware architectures
------EF Rose::BinaryAnalysis::Ast -- operating on binary abstract syntax trees
------EF Rose::BinaryAnalysis::BestMapAddress -- computing mem mapping based on insns
------EF Rose::BinaryAnalysis::BinaryLoader -- mapping files into virtual memory
------EF Rose::BinaryAnalysis::BinaryToSource -- lifting assembly to C
------EF Rose::BinaryAnalysis::CallingConvention -- computing function calling conventions
------EF Rose::BinaryAnalysis::CodeInserter -- inserting code into an existing specimen
------EF Rose::BinaryAnalysis::Concolic -- concolic testing
------EF Rose::BinaryAnalysis::DataFlow -- solving data-flow analysis problems
------EF Rose::BinaryAnalysis::Debugger -- debugging other processes
------EF Rose::BinaryAnalysis::Disassembler -- decoding machine language instructions
------EF Rose::BinaryAnalysis::Dwarf -- parsing DWARF debug information
------EF Rose::BinaryAnalysis::FeasiblePath -- model checking and path feasibility
------EF Rose::BinaryAnalysis::FunctionSimilarity -- matching function pairs based on similarity
------EF Rose::BinaryAnalysis::HotPatch -- semantic hot patching
------EF Rose::BinaryAnalysis::InstructionSemantics -- evaluating instructions based on their behaviors
------EF Rose::BinaryAnalysis::LibraryIdentification -- fast library identification and recognition (FLIR)
------EF Rose::BinaryAnalysis::ModelChecker -- model checking
------EF Rose::BinaryAnalysis::NoOperation -- determining insn sequences having no effect
------EF Rose::BinaryAnalysis::Partitioner2 -- partitioning insns to basic blocks and functions
------EF Rose::BinaryAnalysis::PointerDetection -- finding pointers to code and data
------EF Rose::BinaryAnalysis::Reachability -- propagating reachability through a CFG
------EF Rose::BinaryAnalysis::ReturnValueUsed -- determining whether a return value is used
------EF Rose::BinaryAnalysis::SerialIo -- reading/writing serialized analysis states
------EF Rose::BinaryAnalysis::SmtSolver -- invoking a satisfiability modulo theory solver
------EF Rose::BinaryAnalysis::StackDelta -- analyzing stack pointer behavior
------EF Rose::BinaryAnalysis::Strings -- detecting string constants
------EF Rose::BinaryAnalysis::SymbolicExpressionParser -- parsing symbolic expressions
------EF Rose::BinaryAnalysis::TaintedFlow -- analyzing based on tainted-flow
------EF Rose::BinaryAnalysis::Unparser -- generating assembly listings (vers 2)
------EF Rose::BinaryAnalysis::Variables -- local and global variable detection
------EF Rose::BinaryAnalysis::VxcoreParser -- parsing and unparsing vxcore format
------EF Rose::EditDistance -- measuring differences using edit distance
------EF Rose::FixupAstDeclarationScope -- normalizing AST declarations
------EF Rose::FixupAstSymbolTablesToSupportAliasedSymbols -- normalizing symbol tables for aliased symbols
------EF Rose::SageBuilder -- building abstract syntax trees
------EF Rose::TestChildPointersInMemoryPool -- testing AST child pointers in memory pools
------EF Rose::UnparseLanguageIndependentConstructs -- generating source code for language-indepentend constructs
------EF rose_ir_node -- operating on ROSE internal representation nodes
------EF sawyer -- Sawyer C++ support library
DTHMIWEF tool -- binary analysis tutorial

Command-line parsing

ROSE binary analysis tools use the Sawyer::CommandLine API for parsing switches and their arguments from the command-line in order to give a consistent look and feel across all tools. Parsing the positional arguments following the switches is up to each individual tool, although many tools can simply feed these to any of the ROSE functions responsible for loading a binary specimen for analysis. Because the switch grammar is known by ROSE but the positional argument grammar is not, it is impossible for ROSE to interleave these two grammars in a sound way. Therefore all command-line arguments to be treated as switches by ROSE parser must occur before any other command-line arguments to be parsed by the tool.

A command-line switch parser is built from individual switch definitions, the switch definitions are combined to form switch groups, and the switch groups are combined to form a switch parser. All of these parts are copyable; for instance, a switch definition is copied when inserted into a switch group.

A switch parser is also responsible for creating the Unix "man" page documentation that describes the command-line switches and the workings of the tool. Documentation is written in a very simple language consisting of paragraphs separated by blank lines. A variety of paragraph types are possible (plain, bulleted lists, named lists, quoted text, etc.) and spans of characters within a paragraph can have styles (plain, variable, emphasized, code, etc). Due to limitations in the ways that man pages are generated, certain restrictions apply, such as the inability to nest lists.

The example tool creates a new switch group whose switch names can be optionally prefixed with "tool" if they need to be disambiguated from other ROSE switches (as in "--tool:output"). A "--output" or "-o" switch is added to this group and takes a single argument that can be any string. After a successful parse of the command-line switches, the argument will be saved in the settings.outputFileName variable. The documentation string demonstrates a single paragraph that makes reference to the (arbitrary) name of the switch argument.

The man page for this switch, generated from ./example --help looks like this, automatically reflowed to the width of the terminal.

Tool-specific switches
--[tool:]output filename; -o filename
Write the assembly listing to the specified file. If the filename
is "-" then output is send to the standard output stream.
Note
Due to limitations of the ROSE documentation system, what you don't see here is that the word "filename" (all three occurrences) is underlined to indicate it's a variable, and that the heading is in a bold font face.

Once the tool switch groups (in this case just one) are defined, we can create a parser and add that group to it. ROSE's command-line parsing is very modular, allowing us to also add a group of standard, generic switches before the tool switches. We also place a "Synopsis" section in the man page, and tell the parser that if it encounters an error it should emit an error message using our FATAL diagnostic stream.

The ROSE binary analysis tools have a policy of defining the single-line purpose and multi-line description at the very top of the source file where it's easily discovered.

Up to this point, we have only defined the parser. Later/below we will show how the parser is used.

Partitioning

ROSE calls the process of distinguishing between instructions and static data, and organizing the instructions into basic blocks and functions "partitioning". Since some forms of binary specimens can arbitrarily mix code and data and don't have enough information to distinguish between them, the general partitioning problem is undecidable. ROSE uses certain heuristics to guess the partitioning, and in most cases these heuristics produce good results.

Partitioning is performed in ROSE with the Rose::BinaryAnalysis::Partitioner2 API, which primarily consists of a number of different engines that interface with and store results in a partitioner. The partitioner is subsequently used by many other parts of ROSE during analysis and unparsing.

Different kinds of binary specimens require different kinds of partitioning approaches. For instance, byte code is often packed in a container from which the code and data can be easily and accurately discovered, while general machine code requires a much more involved heuristic approach for an ultimately undecidable problem. These approaches are encoded in partitioning engines like EngineBinary and EngineJvm, each of which take different command-line switches. A tool must surmount the chicken-versus-egg problem of being able to parse the command-line switches, producing documentation, and configuring an engine before knowing what engine is ultimately required. The specifics are documented in the engine base class, but in general the steps are:

These steps are all performed with two function calls from the tool. One to find the correct engine and another to process the command-line using the adjusted parser. Command-line parsing has two parts: the actual parsing and verification of the command-line syntax, and then applying the parse results to update the C++ switch argument destination variables that were noted when the parser was built, namely our Settings settings variable in main and the settings in the engine that was returned. For this reason, the locations bound to the parser must outlive the call to apply.

After parsing the command-line switches, the tool obtains the non-switch, positional arguments by calling unreachedArgs and we check them to see that a specimen was actually given on the command-line. The tool also emits some information about what engine is being used.

Finally, the tool runs the partitioning engine by calling its partition method with the specimen description positional arguments from the command-line. The tool's man page ("--help") describes at length the different ways to describe a binary specimen, and ROSE supports parsing containers like ELF, PE and java class files and initializing virtual analysis memory from their segment/section descriptions and/or initializing memory in other ways: from raw memory dumps, from Motorola S-Records, from Intel HEX files, from running Linux processes, by creating a Linux process and interrupting it, from ELF core dumps, from previously saved ROSE Binary Analysis (RBA) files, from data bytes specified on the command-line, or from custom-designed formats. Additionally, parts of the address space can be subsequently adjusted such as setting or clearing access permissions, or erasing parts of the space. Ultimately, what gets created at this step before the core partitioning algorithms run is a virtual address space represented by a Rose::BinaryAnalysis::MemoryMap object.

The partitioning process can be controlled at a finer granularity, but the most common approach is to call Rose::BinaryAnalysis::Partitioner2::Engine::partition and do everything at once. The result is a Partitioner object that holds information that later analyses can obtain efficiently, such as the virtual memory map and the processor architecture.

Shared-ownership pointers

This is a good time to mention the various Ptr types already encountered in this example. ROSE binary analysis objects are mostly allocated on the heap and accessed through reference counting pointers. These objects are not created with the usual C++ constructors (which have been made protected to prevent accidental misuse), but rather with static member functions usually named instance. Therefore, calls to the new and delete operators are almost never encountered in ROSE binary analysis tools and memory errors are less likely. The type ConstPtr is a shared-ownership pointer to a const object.

The reason that the pointer types have these names is twofold. It's shorter to write Foo::Ptr than to write std::shared_ptr<Foo>, but mainly because ROSE uses three kinds of shared-ownership pointers:

All of these pointers support the usual pointer-like operations of dereferencing with operator* and operator->, assignment from compatible pointers with operator=, and testing whether the pointer is null with explicit operator bool.

When only forward declarations are present (when you only include "BasicTypes.h" header files), the pointer types are juxtaposed with the class name, as in FooPtr and FooConstPtr versus Foo::Ptr and Foo::ConstPtr. The binary analysis convention is that the juxtaposed names are used in header files (and thus most documentation) and the separate names are used everywhere else. This convention enables header files to have fewer dependencies.

Other special types

One thing to notice with binary analysis is that the C++ signed integral types are almost never used; only unsigned types are used. This is because most modern arithmetic machine instructions operate on unsigned values, and relatively few arithmetic instructions need to make a distinction between signed and unsigned operation. Because of this, subtraction in a two's complement paradigm is usually accomplished by overflow of unsigned addition.

Another reason for using almost exclusively unsigned types is that binary specimens routinely have values near the high end of the unsigned range, and even values like 32-bit 0xffffffff is common. This tidbit is one reason ROSE has its own interval types that store the interval's maximum value instead of the more usual C++ one-after-the-end value, and why binary analysis tends to use intervals instead of size (e.g., the size of (number of values in) an interval that spans the entire domain is one larger than can be represented in that domain).

One important thing to be aware of for C++ signed integral values is that the compiler can assume that signed overflow is not possible, and if it actually occurs the behavior is undefined. The C++ compiler is not required to diagnose the undefined behavior nor is the compiled program required to do anything meaningful.

Unparsing

Unparsing means two things in ROSE binary analysis: recreating the specimen from ROSE's (possibly modified) intermediate representation (IR), and producing an assembly listing. Although it is possible to modify the IR to produce a new specimen, doing so is generally unsound because not only is the partitioning undecidable, but also because a binary generally doesn't have enough information to adjust all cross-references to moved code and data (or for that matter, to even know about all the cross references).

Therefore, unparsing in the context of binary analysis usually means unparsing the IR to an assembly code representation. ROSE, being a library to aid human understanding of binaries and because of the undecidability of partitioning in the first place, has it's own assembly format that's not necessarily intended to be reassembled into a binary. To that end, ROSE's syntax is more uniform across instruction sets, and often more verbose than the typical assembler for that architecture. ROSE does, however, generally preserve native instruction mnemonics and operand order.

ROSE's unparser is a hierarchy of classes fully extensible by the user in their own tools at compile time. These unparsers are highly configurable yet creating a specialized unparser is very simple. An unparser can:

An easy way to unparse a single instruction without leveraging all the power of a full unparser, is to call the instruction's toString method. But this example, because it wants to unparse an entire specimen, obtains a suitable unparser for the specimen's architecture and then calls its unparse method. The outputFile function is defined in the example tool to return a std::ostream reference based on the argument to the "--output" command-line switch (if any).

Note
ROSE also has a legacy unparser framework which is being phased out. It's defined in "src/backend/asmUnparser" in the class Rose::BinaryAnalysis::AsmUnaprser (intentionally not cross referenced here since you shouldn't use it).

Architecture abstraction

You may have noticed the call(s) to obtain an architecture. ROSE abstracts most architecture-specific information and algorithms into classes derived from Rose::BinaryAnalysis::Architecture::Base. A number of these architectures are built into the ROSE library, but users can also define their own architectures and register them using the functions in the Rose::BinaryAnalysis::Architecture namespace. In fact, the user's architecture definition can be compiled into its own library and made available to standard ROSE tools at runtime with their "--architectures" switch.

Full listing

Here is the full listing of the example program with cross references.

Compiling

To compile this program you'll want to use the same compiler, preprocessor switches, compiler switches, and loader switches as are used when compiling ROSE. This is important since C++ has no official, documented application binary interface. Mixing libraries compiled with different C++ compilers, compiler versions, compiler optimization levels, or even other seemingly benign compiler switches is not guaranteed to work.

When ROSE is installed, a text file describing the compiler is also installed. Depending on the installation mechanism, this file has one of the following names w.r.t. the root of the ROSE installation:

Although the above example is part of the ROSE library and is compiled when the library is built, in general a project will need it's own build system. Projects officially sanctioned by the ROSE team must follow the project requirements outlined on the ROSE internal wiki. Users are free to design their build system to do whatever they want, but using the example project from ROSE itself is a good starting point. You can find the example on GitHub.

Namespaces

namespace  Architecture
 Architecture-specific information and algorithms.
 
namespace  ByteOrder
 Definitions dealing with byte order.
 
namespace  CallingConvention
 Support for binary calling conventions.
 
namespace  Commit
 Whether to commit memory allocations.
 
namespace  Concolic
 Combined concrete and symbolic analysis.
 
namespace  Debugger
 Name space for dynamic debuggers.
 
namespace  Disassembler
 Instruction decoders.
 
namespace  Dwarf
 Functions for DWARF debugging information.
 
namespace  InstructionSemantics
 Binary instruction semantics.
 
namespace  Partitioner2
 Binary function detection.
 
namespace  PointerDetection
 Pointer detection analysis.
 
namespace  ReturnValueUsed
 Contains functions that analyze whether a function returns a value which is used by the caller.
 
namespace  StackDelta
 Stack delta analysis.
 
namespace  Strings
 Suport for finding strings in memory.
 
namespace  SymbolicExpression
 Namespace supplying types and functions for symbolic expressions.
 
namespace  Unparser
 Generates pseudo-assembly listings.
 
namespace  Variables
 Finding and describing source-level variables.
 

Classes

class  AbstractLocation
 Abstract location. More...
 
class  Alignment
 Information about alignments. More...
 
class  AsmFunctionIndex
 Functions indexed by entry address. More...
 
class  AsmUnparser
 
class  Assembler
 Virtual base class for instruction assemblers. More...
 
class  AssemblerX86
 This class contains methods for assembling x86 instructions (SgAsmX86Instruction). More...
 
class  AstHasher
 Compute the hash for an AST. More...
 
class  BestMapAddress
 Finds best address for mapping code. More...
 
class  BinaryLoader
 Base class for loading a static or dynamic object. More...
 
class  BinaryLoaderElf
 Loader for ELF files. More...
 
class  BinaryLoaderElfObj
 A loader suitable for ELF object files. More...
 
class  BinaryLoaderPe
 Loader for Windows PE files. More...
 
class  BinaryToSource
 Convert binary to low-level C source code. More...
 
class  CodeInserter
 Insert new code in place of existing instructions. More...
 
class  CompareLeavesByName
 
class  CompareRawLeavesByName
 
class  ConcreteLocation
 Concrete location of data. More...
 
class  ControlFlow
 Binary control flow analysis. More...
 
class  DataFlow
 Various tools for data-flow analysis. More...
 
class  Demangler
 Demangle mangled names. More...
 
class  FeasiblePath
 Feasible path analysis. More...
 
class  FunctionCall
 Binary function call analysis. More...
 
class  FunctionSimilarity
 Analysis to test the similarity of two functions. More...
 
struct  HexdumpFormat
 Settings that control how the lowest-level hexdump function behaves. More...
 
class  HotPatch
 Describes how to modify machine state after each instruction. More...
 
struct  InsnCFGVertexWriter
 A vertex property writer for instruction-based CFGs. More...
 
class  InstructionProvider
 Provides and caches instructions. More...
 
class  MagicNumber
 
class  Matrix
 Matrix values. More...
 
class  MemoryMap
 An efficient mapping from an address space to stored data. More...
 
class  NoOperation
 Analysis that looks for no-op equivalents. More...
 
class  Reachability
 Analysis that computes reachability of CFG vertices. More...
 
class  ReadWriteSets
 Sets of variables based on whether they're read or written. More...
 
class  RegisterDescriptor
 Describes (part of) a physical CPU register. More...
 
class  RegisterDictionary
 Defines registers available for a particular architecture. More...
 
class  RegisterNames
 Convert a register descriptor to a name. More...
 
class  RegisterParts
 Holds a set of registers without regard for register boundaries. More...
 
class  RelativeVirtualAddress
 Optionally bound relative virtual address. More...
 
class  SerialInput
 Input binary analysis state. More...
 
class  SerialIo
 Base class for binary state input and output. More...
 
class  SerialOutput
 Output binary analysis state. More...
 
class  SmtlibSolver
 Wrapper around solvers that speak SMT-LIB. More...
 
class  SmtSolver
 Interface to Satisfiability Modulo Theory (SMT) solvers. More...
 
class  SmtSolverValidator
 Validates SMT solver name from command-line. More...
 
class  SourceLocations
 Bidirectional mapping between addresses and source locations. More...
 
class  SRecord
 S-Record hexadecimal data formats. More...
 
class  SymbolicExpressionParser
 Parses symbolic expressions from text. More...
 
class  SystemCall
 Analyzes basic blocks to get system call names. More...
 
class  TaintedFlow
 Various tools for performing tainted flow analysis. More...
 
class  VxcoreParser
 Parser for Vxcore format files. More...
 
class  Z3Solver
 Interface to the Z3 SMT solver. More...
 

Typedefs

using Address = std::uint64_t
 Address.
 
using AddressInterval = Sawyer::Container::Interval< Address >
 An interval of addresses.
 
using AddressIntervalSet = Sawyer::Container::IntervalSet< AddressInterval >
 A set of virtual addresses.
 
using AddressSet = Sawyer::Container::Set< Address >
 Set of addresses.
 
using BinaryLoaderPtr = Sawyer::SharedPointer< BinaryLoader >
 Reference counting pointer.
 
using BinaryLoaderElfPtr = Sawyer::SharedPointer< BinaryLoaderElf >
 Reference counting pointer.
 
using BinaryLoaderElfObjPtr = Sawyer::SharedPointer< BinaryLoaderElfObj >
 Reference counting pointer.
 
using BinaryLoaderPePtr = Sawyer::SharedPointer< BinaryLoaderPe >
 Refernce counting pointer.
 
using MemoryMapPtr = Sawyer::SharedPointer< MemoryMap >
 Reference counting pointer.
 
using ReadWriteSetsPtr = std::shared_ptr< ReadWriteSets >
 Reference counting pointer.
 
using RegisterDescriptors = std::vector< RegisterDescriptor >
 List of register descriptors in dictionary.
 
using RegisterDictionaryPtr = Sawyer::SharedPointer< RegisterDictionary >
 Reference counting pointer.
 
using SerialInputPtr = Sawyer::SharedPointer< SerialInput >
 Reference counting pointer.
 
using SerialIoPtr = Sawyer::SharedPointer< SerialIo >
 Reference counting pointer.
 
using SerialOutputPtr = Sawyer::SharedPointer< SerialOutput >
 Reference counting pointer.
 
using SmtSolverPtr = std::shared_ptr< SmtSolver >
 Reference counting pointer.
 
using SymbolicExpressionPtr = SymbolicExpression::Ptr
 
using InstructionMap = Map< Address, SgAsmInstruction * >
 Mapping from instruction addresses to instructions.
 

Enumerations

enum  CilFamily { Cil_family = 0xffffffff }
 
enum  CilInstructionKind {
  Cil_unknown_instruction = 0x0000 ,
  Cil_nop =0xFF00 ,
  Cil_break ,
  Cil_ldarg_0 ,
  Cil_ldarg_1 ,
  Cil_ldarg_2 ,
  Cil_ldarg_3 ,
  Cil_ldloc_0 ,
  Cil_ldloc_1 ,
  Cil_ldloc_2 ,
  Cil_ldloc_3 ,
  Cil_stloc_0 ,
  Cil_stloc_1 ,
  Cil_stloc_2 ,
  Cil_stloc_3 ,
  Cil_ldarg_s ,
  Cil_ldarga_s ,
  Cil_starg_s ,
  Cil_ldloc_s ,
  Cil_ldloca_s ,
  Cil_stloc_s ,
  Cil_ldnull ,
  Cil_ldc_i4_m1 ,
  Cil_ldc_i4_0 ,
  Cil_ldc_i4_1 ,
  Cil_ldc_i4_2 ,
  Cil_ldc_i4_3 ,
  Cil_ldc_i4_4 ,
  Cil_ldc_i4_5 ,
  Cil_ldc_i4_6 ,
  Cil_ldc_i4_7 ,
  Cil_ldc_i4_8 ,
  Cil_ldc_i4_s ,
  Cil_ldc_i4 ,
  Cil_ldc_i8 ,
  Cil_ldc_r4 ,
  Cil_ldc_r8 ,
  Cil_unused99 ,
  Cil_dup ,
  Cil_pop ,
  Cil_jmp ,
  Cil_call ,
  Cil_calli ,
  Cil_ret ,
  Cil_br_s ,
  Cil_brfalse_s ,
  Cil_brtrue_s ,
  Cil_beq_s ,
  Cil_bge_s ,
  Cil_bgt_s ,
  Cil_ble_s ,
  Cil_blt_s ,
  Cil_bne_un_s ,
  Cil_bge_un_s ,
  Cil_bgt_un_s ,
  Cil_ble_un_s ,
  Cil_blt_un_s ,
  Cil_br ,
  Cil_brfalse ,
  Cil_brtrue ,
  Cil_beq ,
  Cil_bge ,
  Cil_bgt ,
  Cil_ble ,
  Cil_blt ,
  Cil_bne_un ,
  Cil_bge_un ,
  Cil_bgt_un ,
  Cil_ble_un ,
  Cil_blt_un ,
  Cil_switch ,
  Cil_ldind_i1 ,
  Cil_ldind_u1 ,
  Cil_ldind_i2 ,
  Cil_ldind_u2 ,
  Cil_ldind_i4 ,
  Cil_ldind_u4 ,
  Cil_ldind_i8 ,
  Cil_ldind_i ,
  Cil_ldind_r4 ,
  Cil_ldind_r8 ,
  Cil_ldind_ref ,
  Cil_stind_ref ,
  Cil_stind_i1 ,
  Cil_stind_i2 ,
  Cil_stind_i4 ,
  Cil_stind_i8 ,
  Cil_stind_r4 ,
  Cil_stind_r8 ,
  Cil_add ,
  Cil_sub ,
  Cil_mul ,
  Cil_div ,
  Cil_div_un ,
  Cil_rem ,
  Cil_rem_un ,
  Cil_and ,
  Cil_or ,
  Cil_xor ,
  Cil_shl ,
  Cil_shr ,
  Cil_shr_un ,
  Cil_neg ,
  Cil_not ,
  Cil_conv_i1 ,
  Cil_conv_i2 ,
  Cil_conv_i4 ,
  Cil_conv_i8 ,
  Cil_conv_r4 ,
  Cil_conv_r8 ,
  Cil_conv_u4 ,
  Cil_conv_u8 ,
  Cil_callvirt ,
  Cil_cpobj ,
  Cil_ldobj ,
  Cil_ldstr ,
  Cil_newobj ,
  Cil_castclass ,
  Cil_isinst ,
  Cil_conv_r_un ,
  Cil_unused58 ,
  Cil_unused1 ,
  Cil_unbox ,
  Cil_throw ,
  Cil_ldfld ,
  Cil_ldflda ,
  Cil_stfld ,
  Cil_ldsfld ,
  Cil_ldsflda ,
  Cil_stsfld ,
  Cil_stobj ,
  Cil_conv_ovf_i1_un ,
  Cil_conv_ovf_i2_un ,
  Cil_conv_ovf_i4_un ,
  Cil_conv_ovf_i8_un ,
  Cil_conv_ovf_u1_un ,
  Cil_conv_ovf_u2_un ,
  Cil_conv_ovf_u4_un ,
  Cil_conv_ovf_u8_un ,
  Cil_conv_ovf_i_un ,
  Cil_conv_ovf_u_un ,
  Cil_box ,
  Cil_newarr ,
  Cil_ldlen ,
  Cil_ldelema ,
  Cil_ldelem_i1 ,
  Cil_ldelem_u1 ,
  Cil_ldelem_i2 ,
  Cil_ldelem_u2 ,
  Cil_ldelem_i4 ,
  Cil_ldelem_u4 ,
  Cil_ldelem_i8 ,
  Cil_ldelem_i ,
  Cil_ldelem_r4 ,
  Cil_ldelem_r8 ,
  Cil_ldelem_ref ,
  Cil_stelem_i ,
  Cil_stelem_i1 ,
  Cil_stelem_i2 ,
  Cil_stelem_i4 ,
  Cil_stelem_i8 ,
  Cil_stelem_r4 ,
  Cil_stelem_r8 ,
  Cil_stelem_ref ,
  Cil_ldelem ,
  Cil_stelem ,
  Cil_unbox_any ,
  Cil_unused5 ,
  Cil_unused6 ,
  Cil_unused7 ,
  Cil_unused8 ,
  Cil_unused9 ,
  Cil_unused10 ,
  Cil_unused11 ,
  Cil_unused12 ,
  Cil_unused13 ,
  Cil_unused14 ,
  Cil_unused15 ,
  Cil_unused16 ,
  Cil_unused17 ,
  Cil_conv_ovf_i1 ,
  Cil_conv_ovf_u1 ,
  Cil_conv_ovf_i2 ,
  Cil_conv_ovf_u2 ,
  Cil_conv_ovf_i4 ,
  Cil_conv_ovf_u4 ,
  Cil_conv_ovf_i8 ,
  Cil_conv_ovf_u8 ,
  Cil_unused50 ,
  Cil_unused18 ,
  Cil_unused19 ,
  Cil_unused20 ,
  Cil_unused21 ,
  Cil_unused22 ,
  Cil_unused23 ,
  Cil_refanyval ,
  Cil_ckfinite ,
  Cil_unused24 ,
  Cil_unused25 ,
  Cil_mkrefany ,
  Cil_unused59 ,
  Cil_unused60 ,
  Cil_unused61 ,
  Cil_unused62 ,
  Cil_unused63 ,
  Cil_unused64 ,
  Cil_unused65 ,
  Cil_unused66 ,
  Cil_unused67 ,
  Cil_ldtoken ,
  Cil_conv_u2 ,
  Cil_conv_u1 ,
  Cil_conv_i ,
  Cil_conv_ovf_i ,
  Cil_conv_ovf_u ,
  Cil_add_ovf ,
  Cil_add_ovf_un ,
  Cil_mul_ovf ,
  Cil_mul_ovf_un ,
  Cil_sub_ovf ,
  Cil_sub_ovf_un ,
  Cil_endfinally ,
  Cil_leave ,
  Cil_leave_s ,
  Cil_stind_i ,
  Cil_conv_u ,
  Cil_unused26 ,
  Cil_unused27 ,
  Cil_unused28 ,
  Cil_unused29 ,
  Cil_unused30 ,
  Cil_unused31 ,
  Cil_unused32 ,
  Cil_unused33 ,
  Cil_unused34 ,
  Cil_unused35 ,
  Cil_unused36 ,
  Cil_unused37 ,
  Cil_unused38 ,
  Cil_unused39 ,
  Cil_unused40 ,
  Cil_unused41 ,
  Cil_unused42 ,
  Cil_unused43 ,
  Cil_unused44 ,
  Cil_unused45 ,
  Cil_unused46 ,
  Cil_unused47 ,
  Cil_unused48 ,
  Cil_prefix7 ,
  Cil_prefix6 ,
  Cil_prefix5 ,
  Cil_prefix4 ,
  Cil_prefix3 ,
  Cil_prefix2 ,
  Cil_prefix1 ,
  Cil_prefixref ,
  Cil_arglist =0xFE00 ,
  Cil_ceq ,
  Cil_cgt ,
  Cil_cgt_un ,
  Cil_clt ,
  Cil_clt_un ,
  Cil_ldftn ,
  Cil_ldvirtftn ,
  Cil_unused56 ,
  Cil_ldarg ,
  Cil_ldarga ,
  Cil_starg ,
  Cil_ldloc ,
  Cil_ldloca ,
  Cil_stloc ,
  Cil_localloc ,
  Cil_unused57 ,
  Cil_endfilter ,
  Cil_unaligned_ ,
  Cil_volatile_ ,
  Cil_tail_ ,
  Cil_initobj ,
  Cil_constrained_ ,
  Cil_cpblk ,
  Cil_initblk ,
  Cil_no_ ,
  Cil_rethrow ,
  Cil_unused ,
  Cil_sizeof ,
  Cil_refanytype ,
  Cil_readonly_ ,
  Cil_unused53 ,
  Cil_unused54 ,
  Cil_unused55 ,
  Cil_unused70 ,
  Cil_mono_icall =0xF000 ,
  Cil_mono_objaddr ,
  Cil_mono_ldptr ,
  Cil_mono_vtaddr ,
  Cil_mono_newobj ,
  Cil_mono_retobj ,
  Cil_mono_ldnativeobj ,
  Cil_mono_cisinst ,
  Cil_mono_ccastclass ,
  Cil_mono_save_lmf ,
  Cil_mono_restore_lmf ,
  Cil_mono_classconst ,
  Cil_mono_not_taken ,
  Cil_mono_tls ,
  Cil_mono_icall_addr ,
  Cil_mono_dyn_call ,
  Cil_mono_memory_barrier ,
  Cil_unused71 ,
  Cil_unused72 ,
  Cil_mono_jit_icall_addr ,
  Cil_mono_ldptr_int_req_flag ,
  Cil_mono_ldptr_card_table ,
  Cil_mono_ldptr_nursery_start ,
  Cil_mono_ldptr_nursery_bits ,
  Cil_mono_calli_extra_arg ,
  Cil_mono_lddomain ,
  Cil_mono_atomic_store_i4 ,
  Cil_mono_save_last_error ,
  Cil_mono_get_rgctx_arg ,
  Cil_mono_ldptr_prof_alloc_count ,
  Cil_mono_ld_delegate_method_ptr ,
  Cil_mono_rethrow ,
  Cil_mono_get_sp ,
  Cil_mono_methodconst ,
  Cil_mono_pinvoke_addr_cache ,
  Cil_last_instruction =0xF023
}
 
enum class  JvmInstructionKind {
  nop = 0 ,
  aconst_null = 1 ,
  iconst_m1 = 2 ,
  iconst_0 = 3 ,
  iconst_1 = 4 ,
  iconst_2 = 5 ,
  iconst_3 = 6 ,
  iconst_4 = 7 ,
  iconst_5 = 8 ,
  lconst_0 = 9 ,
  lconst_1 = 10 ,
  fconst_0 = 11 ,
  fconst_1 = 12 ,
  fconst_2 = 13 ,
  dconst_0 = 14 ,
  dconst_1 = 15 ,
  bipush = 16 ,
  sipush = 17 ,
  ldc = 18 ,
  ldc_w = 19 ,
  ldc2_w = 20 ,
  iload = 21 ,
  lload = 22 ,
  fload = 23 ,
  dload = 24 ,
  aload = 25 ,
  iload_0 = 26 ,
  iload_1 = 27 ,
  iload_2 = 28 ,
  iload_3 = 29 ,
  lload_0 = 30 ,
  lload_1 = 31 ,
  lload_2 = 32 ,
  lload_3 = 33 ,
  fload_0 = 34 ,
  fload_1 = 35 ,
  fload_2 = 36 ,
  fload_3 = 37 ,
  dload_0 = 38 ,
  dload_1 = 39 ,
  dload_2 = 40 ,
  dload_3 = 41 ,
  aload_0 = 42 ,
  aload_1 = 43 ,
  aload_2 = 44 ,
  aload_3 = 45 ,
  iaload = 46 ,
  laload = 47 ,
  faload = 48 ,
  daload = 49 ,
  aaload = 50 ,
  baload = 51 ,
  caload = 52 ,
  saload = 53 ,
  istore = 54 ,
  lstore = 55 ,
  fstore = 56 ,
  dstore = 57 ,
  astore = 58 ,
  istore_0 = 59 ,
  istore_1 = 60 ,
  istore_2 = 61 ,
  istore_3 = 62 ,
  lstore_0 = 63 ,
  lstore_1 = 64 ,
  lstore_2 = 65 ,
  lstore_3 = 66 ,
  fstore_0 = 67 ,
  fstore_1 = 68 ,
  fstore_2 = 69 ,
  fstore_3 = 70 ,
  dstore_0 = 71 ,
  dstore_1 = 72 ,
  dstore_2 = 73 ,
  dstore_3 = 74 ,
  astore_0 = 75 ,
  astore_1 = 76 ,
  astore_2 = 77 ,
  astore_3 = 78 ,
  iastore = 79 ,
  lastore = 80 ,
  fastore = 81 ,
  dastore = 82 ,
  aastore = 83 ,
  bastore = 84 ,
  castore = 85 ,
  sastore = 86 ,
  pop = 87 ,
  pop2 = 88 ,
  dup = 89 ,
  dup_x1 = 90 ,
  dup_x2 = 91 ,
  dup2 = 92 ,
  dup2_x1 = 93 ,
  dup2_x2 = 94 ,
  swap = 95 ,
  iadd = 96 ,
  ladd = 97 ,
  fadd = 98 ,
  dadd = 99 ,
  isub = 100 ,
  lsub = 101 ,
  fsub = 102 ,
  dsub = 103 ,
  imul = 104 ,
  lmul = 105 ,
  fmul = 106 ,
  dmul = 107 ,
  idiv = 108 ,
  ldiv = 109 ,
  fdiv = 110 ,
  ddiv = 111 ,
  irem = 112 ,
  lrem = 113 ,
  frem = 114 ,
  drem = 115 ,
  ineg = 116 ,
  lneg = 117 ,
  fneg = 118 ,
  dneg = 119 ,
  ishl = 120 ,
  lshl = 121 ,
  ishr = 122 ,
  lshr = 123 ,
  iushr = 124 ,
  lushr = 125 ,
  iand = 126 ,
  land = 127 ,
  ior = 128 ,
  lor = 129 ,
  ixor = 130 ,
  lxor = 131 ,
  iinc = 132 ,
  i2l = 133 ,
  i2f = 134 ,
  i2d = 135 ,
  l2i = 136 ,
  l2f = 137 ,
  l2d = 138 ,
  f2i = 139 ,
  f2l = 140 ,
  f2d = 141 ,
  d2i = 142 ,
  d2l = 143 ,
  d2f = 144 ,
  i2b = 145 ,
  i2c = 146 ,
  i2s = 147 ,
  lcmp = 148 ,
  fcmpl = 149 ,
  fcmpg = 150 ,
  dcmpl = 151 ,
  dcmpg = 152 ,
  ifeq = 153 ,
  ifne = 154 ,
  iflt = 155 ,
  ifge = 156 ,
  ifgt = 157 ,
  ifle = 158 ,
  if_icmpeq = 159 ,
  if_icmpne = 160 ,
  if_icmplt = 161 ,
  if_icmpge = 162 ,
  if_icmpgt = 163 ,
  if_icmple = 164 ,
  if_acmpeq = 165 ,
  if_acmpne = 166 ,
  goto_ = 167 ,
  jsr = 168 ,
  ret = 169 ,
  tableswitch = 170 ,
  lookupswitch = 171 ,
  ireturn = 172 ,
  lreturn = 173 ,
  freturn = 174 ,
  dreturn = 175 ,
  areturn = 176 ,
  return_ = 177 ,
  getstatic = 178 ,
  putstatic = 179 ,
  getfield = 180 ,
  putfield = 181 ,
  invokevirtual = 182 ,
  invokespecial = 183 ,
  invokestatic = 184 ,
  invokeinterface = 185 ,
  invokedynamic = 186 ,
  new_ = 187 ,
  newarray = 188 ,
  anewarray = 189 ,
  arraylength = 190 ,
  athrow = 191 ,
  checkcast = 192 ,
  instanceof = 193 ,
  monitorenter = 194 ,
  monitorexit = 195 ,
  wide = 196 ,
  multianewarray = 197 ,
  ifnull = 198 ,
  ifnonnull = 199 ,
  goto_w = 200 ,
  jsr_w = 201 ,
  breakpoint = 202 ,
  impdep1 = 254 ,
  impdep2 = 255 ,
  unknown = 666
}
 
enum  M68kFamily {
  m68k_family = 0xffffffff ,
  m68k_generation_1 = 0x000000ff ,
  m68k_68000_only = 0x00000001 ,
  m68k_68ec000 = 0x00000002 ,
  m68k_68hc000 = 0x00000004 ,
  m68k_68000 = 0x00000007 ,
  m68k_68008 = 0x00000008 ,
  m68k_68010 = 0x00000010 ,
  m68k_68012 = 0x00000020 ,
  m68k_generation_2 = 0x0000ff00 ,
  m68k_68020_only = 0x00000100 ,
  m68k_68ec020 = 0x00000200 ,
  m68k_68020 = 0x00000300 ,
  m68k_68030_only = 0x00000400 ,
  m68k_68ec030 = 0x00001000 ,
  m68k_68030 = 0x00002000 ,
  m68k_generation_3 = 0x00ff0000 ,
  m68k_68040_only = 0x00010000 ,
  m68k_68ec040 = 0x00020000 ,
  m68k_68lc040 = 0x00040000 ,
  m68k_68040 = 0x00070000 ,
  m68k_freescale = 0xff000000 ,
  m68k_freescale_cpu32 = 0x01000000 ,
  m68k_freescale_isaa = 0x02000000 ,
  m68k_freescale_isab = 0x04000000 ,
  m68k_freescale_isac = 0x08000000 ,
  m68k_freescale_fpu = 0x10000000 ,
  m68k_freescale_mac = 0x20000000 ,
  m68k_freescale_emac = 0x40000000 ,
  m68k_freescale_emacb = 0x80000000
}
 
enum  M68kRegisterClass {
  m68k_regclass_data ,
  m68k_regclass_addr ,
  m68k_regclass_fpr ,
  m68k_regclass_spr ,
  m68k_regclass_mac ,
  m68k_regclass_sup
}
 
enum  M68kSpecialPurposeRegister {
  m68k_spr_pc ,
  m68k_spr_sr ,
  m68k_spr_fpcr ,
  m68k_spr_fpsr ,
  m68k_spr_fpiar
}
 
enum  M68kMacRegister {
  m68k_mac_macsr ,
  m68k_mac_acc0 ,
  m68k_mac_acc1 ,
  m68k_mac_acc2 ,
  m68k_mac_acc3 ,
  m68k_mac_ext01 ,
  m68k_mac_ext23 ,
  m68k_mac_ext0 ,
  m68k_mac_ext1 ,
  m68k_mac_ext2 ,
  m68k_mac_ext3 ,
  m68k_mac_mask
}
 
enum  M68kEmacRegister {
  m68k_emac_macsr ,
  m68k_emac_acc0 ,
  m68k_emac_acc1 ,
  m68k_emac_acc2 ,
  m68k_emac_acc3 ,
  m68k_emac_mask
}
 
enum  M68kSupervisorRegister {
  m68k_sup_vbr ,
  m68k_sup_ssp ,
  m68k_sup_sfc ,
  m68k_sup_dfc ,
  m68k_sup_cacr ,
  m68k_sup_asid ,
  m68k_sup_acr0 ,
  m68k_sup_acr1 ,
  m68k_sup_acr2 ,
  m68k_sup_acr3 ,
  m68k_sup_mmubar ,
  m68k_sup_rombar0 ,
  m68k_sup_rombar1 ,
  m68k_sup_rambar0 ,
  m68k_sup_rambar1 ,
  m68k_sup_mbar ,
  m68k_sup_mpcr ,
  m68k_sup_edrambar ,
  m68k_sup_secmbar ,
  m68k_sup_0_pcr1 ,
  m68k_sup_0_pcr2 ,
  m68k_sup_0_pcr3 ,
  m68k_sup_1_pcr1 ,
  m68k_sup_1_pcr2 ,
  m68k_sup_1_pcr3
}
 
enum  M68kEffectiveAddressMode {
  m68k_eam_unknown = 0 ,
  m68k_eam_drd = 0x00000001 ,
  m68k_eam_ard = 0x00000002 ,
  m68k_eam_ari = 0x00000004 ,
  m68k_eam_inc = 0x00000008 ,
  m68k_eam_dec = 0x00000010 ,
  m68k_eam_dsp = 0x00000020 ,
  m68k_eam_idx8 = 0x00000040 ,
  m68k_eam_idxbd = 0x00000080 ,
  m68k_eam_mpost = 0x00000100 ,
  m68k_eam_mpre = 0x00000200 ,
  m68k_eam_pcdsp = 0x00000400 ,
  m68k_eam_pcidx8 = 0x00000800 ,
  m68k_eam_pcidxbd = 0x00001000 ,
  m68k_eam_pcmpost = 0x00002000 ,
  m68k_eam_pcmpre = 0x00004000 ,
  m68k_eam_absw = 0x00008000 ,
  m68k_eam_absl = 0x00010000 ,
  m68k_eam_imm = 0x00020000 ,
  m68k_eam_all = 0x0003ffff ,
  m68k_eam_rd = 0x00000003 ,
  m68k_eam_ri = 0x0000003c ,
  m68k_eam_idx = 0x000000c0 ,
  m68k_eam_mi = 0x00000300 ,
  m68k_eam_pci = 0x00000400 ,
  m68k_eam_pcidx = 0x00001800 ,
  m68k_eam_pcmi = 0x00006000 ,
  m68k_eam_abs = 0x00018000 ,
  m68k_eam_data = 0x0003fffd ,
  m68k_eam_memory = 0x0003fffc ,
  m68k_eam_control = 0x0001ffe4 ,
  m68k_eam_alter = 0x0001e3ff ,
  m68k_eam_234 = 0x00007380 ,
  m68k_eam_direct = 0x00000003 ,
  m68k_eam_pc = 0x00007c00
}
 
enum  M68kDataFormat {
  m68k_fmt_i32 = 0 ,
  m68k_fmt_f32 = 1 ,
  m68k_fmt_f96 = 2 ,
  m68k_fmt_p96 = 3 ,
  m68k_fmt_i16 = 4 ,
  m68k_fmt_f64 = 5 ,
  m68k_fmt_i8 = 6 ,
  m68k_fmt_unknown = 255
}
 
enum  M68kInstructionKind {
  m68k_unknown_instruction ,
  m68k_abcd ,
  m68k_add ,
  m68k_adda ,
  m68k_addi ,
  m68k_addq ,
  m68k_addx ,
  m68k_and ,
  m68k_andi ,
  m68k_asl ,
  m68k_asr ,
  m68k_bcc ,
  m68k_bcs ,
  m68k_beq ,
  m68k_bge ,
  m68k_bgt ,
  m68k_bhi ,
  m68k_ble ,
  m68k_bls ,
  m68k_blt ,
  m68k_bmi ,
  m68k_bne ,
  m68k_bpl ,
  m68k_bvc ,
  m68k_bvs ,
  m68k_bchg ,
  m68k_bclr ,
  m68k_bfchg ,
  m68k_bfclr ,
  m68k_bfexts ,
  m68k_bfextu ,
  m68k_bfins ,
  m68k_bfset ,
  m68k_bftst ,
  m68k_bkpt ,
  m68k_bra ,
  m68k_bset ,
  m68k_bsr ,
  m68k_btst ,
  m68k_callm ,
  m68k_cas ,
  m68k_cas2 ,
  m68k_chk ,
  m68k_chk2 ,
  m68k_clr ,
  m68k_cmp ,
  m68k_cmp2 ,
  m68k_cmpa ,
  m68k_cmpi ,
  m68k_cmpm ,
  m68k_cpusha ,
  m68k_cpushl ,
  m68k_cpushp ,
  m68k_dbt ,
  m68k_dbf ,
  m68k_dbhi ,
  m68k_dbls ,
  m68k_dbcc ,
  m68k_dbcs ,
  m68k_dbne ,
  m68k_dbeq ,
  m68k_dbvc ,
  m68k_dbvs ,
  m68k_dbpl ,
  m68k_dbmi ,
  m68k_dbge ,
  m68k_dblt ,
  m68k_dbgt ,
  m68k_dble ,
  m68k_divs ,
  m68k_divsl ,
  m68k_divu ,
  m68k_divul ,
  m68k_eor ,
  m68k_eori ,
  m68k_exg ,
  m68k_ext ,
  m68k_extb ,
  m68k_fabs ,
  m68k_fadd ,
  m68k_fbeq ,
  m68k_fbne ,
  m68k_fbgt ,
  m68k_fbngt ,
  m68k_fbge ,
  m68k_fbnge ,
  m68k_fblt ,
  m68k_fbnlt ,
  m68k_fble ,
  m68k_fbnle ,
  m68k_fbgl ,
  m68k_fbngl ,
  m68k_fbgle ,
  m68k_fbngle ,
  m68k_fbogt ,
  m68k_fbule ,
  m68k_fboge ,
  m68k_fbult ,
  m68k_fbolt ,
  m68k_fbuge ,
  m68k_fbole ,
  m68k_fbugt ,
  m68k_fbogl ,
  m68k_fbueq ,
  m68k_fbor ,
  m68k_fbun ,
  m68k_fbf ,
  m68k_fbt ,
  m68k_fbsf ,
  m68k_fbst ,
  m68k_fbseq ,
  m68k_fbsne ,
  m68k_fcmp ,
  m68k_fdabs ,
  m68k_fdadd ,
  m68k_fddiv ,
  m68k_fdiv ,
  m68k_fdmove ,
  m68k_fdmul ,
  m68k_fdneg ,
  m68k_fdsqrt ,
  m68k_fdsub ,
  m68k_fint ,
  m68k_fintrz ,
  m68k_fmove ,
  m68k_fmovem ,
  m68k_fmul ,
  m68k_fneg ,
  m68k_fnop ,
  m68k_fsabs ,
  m68k_fsadd ,
  m68k_fsdiv ,
  m68k_fsmove ,
  m68k_fsmul ,
  m68k_fsneg ,
  m68k_fsqrt ,
  m68k_fssqrt ,
  m68k_fssub ,
  m68k_fsub ,
  m68k_ftst ,
  m68k_illegal ,
  m68k_jmp ,
  m68k_jsr ,
  m68k_lea ,
  m68k_link ,
  m68k_lsl ,
  m68k_lsr ,
  m68k_mac ,
  m68k_mov3q ,
  m68k_movclr ,
  m68k_move ,
  m68k_move_acc ,
  m68k_move_accext ,
  m68k_move_ccr ,
  m68k_move_macsr ,
  m68k_move_mask ,
  m68k_move_sr ,
  m68k_move16 ,
  m68k_movea ,
  m68k_movec ,
  m68k_movem ,
  m68k_movep ,
  m68k_moveq ,
  m68k_msac ,
  m68k_muls ,
  m68k_mulu ,
  m68k_mvs ,
  m68k_mvz ,
  m68k_nbcd ,
  m68k_neg ,
  m68k_negx ,
  m68k_nop ,
  m68k_not ,
  m68k_or ,
  m68k_ori ,
  m68k_pack ,
  m68k_pea ,
  m68k_rol ,
  m68k_ror ,
  m68k_roxl ,
  m68k_roxr ,
  m68k_rtd ,
  m68k_rtm ,
  m68k_rtr ,
  m68k_rts ,
  m68k_sbcd ,
  m68k_st ,
  m68k_sf ,
  m68k_shi ,
  m68k_sls ,
  m68k_scc ,
  m68k_scs ,
  m68k_sne ,
  m68k_seq ,
  m68k_svc ,
  m68k_svs ,
  m68k_spl ,
  m68k_smi ,
  m68k_sge ,
  m68k_slt ,
  m68k_sgt ,
  m68k_sle ,
  m68k_sub ,
  m68k_suba ,
  m68k_subi ,
  m68k_subq ,
  m68k_subx ,
  m68k_swap ,
  m68k_tas ,
  m68k_trap ,
  m68k_trapt ,
  m68k_trapf ,
  m68k_traphi ,
  m68k_trapls ,
  m68k_trapcc ,
  m68k_trapcs ,
  m68k_trapne ,
  m68k_trapeq ,
  m68k_trapvc ,
  m68k_trapvs ,
  m68k_trappl ,
  m68k_trapmi ,
  m68k_trapge ,
  m68k_traplt ,
  m68k_trapgt ,
  m68k_traple ,
  m68k_trapv ,
  m68k_tst ,
  m68k_unlk ,
  m68k_unpk ,
  m68k_last_instruction
}
 
enum  MipsRegisterClass {
  mips_regclass_gpr ,
  mips_regclass_spr ,
  mips_regclass_fpr ,
  mips_regclass_fcsr ,
  mips_regclass_cp0gpr ,
  mips_regclass_cp2gpr ,
  mips_regclass_cp2spr ,
  mips_regclass_sgpr ,
  mips_regclass_hw
}
 
enum  MipsFcsrMinors {
  mips_fcsr_all ,
  mips_fcsr_fccr ,
  mips_fcsr_fexr ,
  mips_fcsr_fenr
}
 
enum  MipsSpecialPurposeRegister {
  mips_spr_hi ,
  mips_spr_lo ,
  mips_spr_pc ,
  mips_spr_fir ,
  mips_spr_fcsr
}
 
enum  MipsInterruptMajor { mips_signal_exception }
 
enum  MipsInterruptMinor {
  mips_breakpoint ,
  mips_integer_overflow ,
  mips_reserved_instruction
}
 
enum  MipsDataFormat {
  mips_fmt_w ,
  mips_fmt_l ,
  mips_fmt_s ,
  mips_fmt_d ,
  mips_fmt_ps
}
 
enum  MipsInstructionKind {
  mips_unknown_instruction ,
  mips_abs_s ,
  mips_abs_d ,
  mips_abs_ps ,
  mips_add ,
  mips_add_s ,
  mips_add_d ,
  mips_add_ps ,
  mips_addi ,
  mips_addiu ,
  mips_addu ,
  mips_alnv_ps ,
  mips_and ,
  mips_andi ,
  mips_b ,
  mips_bal ,
  mips_bc1f ,
  mips_bc1fl ,
  mips_bc1t ,
  mips_bc1tl ,
  mips_bc2f ,
  mips_bc2fl ,
  mips_bc2t ,
  mips_bc2tl ,
  mips_beq ,
  mips_beql ,
  mips_bgez ,
  mips_bgezal ,
  mips_bgezall ,
  mips_bgezl ,
  mips_bgtz ,
  mips_bgtzl ,
  mips_blez ,
  mips_blezl ,
  mips_bltz ,
  mips_bltzal ,
  mips_bltzall ,
  mips_bltzl ,
  mips_bne ,
  mips_bnel ,
  mips_break ,
  mips_c_f_s ,
  mips_c_un_s ,
  mips_c_eq_s ,
  mips_c_ueq_s ,
  mips_c_olt_s ,
  mips_c_ult_s ,
  mips_c_ole_s ,
  mips_c_ule_s ,
  mips_c_sf_s ,
  mips_c_ngle_s ,
  mips_c_seq_s ,
  mips_c_ngl_s ,
  mips_c_lt_s ,
  mips_c_nge_s ,
  mips_c_le_s ,
  mips_c_ngt_s ,
  mips_c_f_d ,
  mips_c_un_d ,
  mips_c_eq_d ,
  mips_c_ueq_d ,
  mips_c_olt_d ,
  mips_c_ult_d ,
  mips_c_ole_d ,
  mips_c_ule_d ,
  mips_c_sf_d ,
  mips_c_ngle_d ,
  mips_c_seq_d ,
  mips_c_ngl_d ,
  mips_c_lt_d ,
  mips_c_nge_d ,
  mips_c_le_d ,
  mips_c_ngt_d ,
  mips_c_f_ps ,
  mips_c_un_ps ,
  mips_c_eq_ps ,
  mips_c_ueq_ps ,
  mips_c_olt_ps ,
  mips_c_ult_ps ,
  mips_c_ole_ps ,
  mips_c_ule_ps ,
  mips_c_sf_ps ,
  mips_c_ngle_ps ,
  mips_c_seq_ps ,
  mips_c_ngl_ps ,
  mips_c_lt_ps ,
  mips_c_nge_ps ,
  mips_c_le_ps ,
  mips_c_ngt_ps ,
  mips_cache ,
  mips_cachee ,
  mips_ceil_l_s ,
  mips_ceil_l_d ,
  mips_ceil_w_s ,
  mips_ceil_w_d ,
  mips_cfc1 ,
  mips_cfc2 ,
  mips_clo ,
  mips_clz ,
  mips_cop2 ,
  mips_ctc1 ,
  mips_ctc2 ,
  mips_cvt_d_s ,
  mips_cvt_d_w ,
  mips_cvt_d_l ,
  mips_cvt_l_s ,
  mips_cvt_l_d ,
  mips_cvt_ps_s ,
  mips_cvt_s_d ,
  mips_cvt_s_w ,
  mips_cvt_s_l ,
  mips_cvt_s_pl ,
  mips_cvt_s_pu ,
  mips_cvt_w_s ,
  mips_cvt_w_d ,
  mips_di ,
  mips_div ,
  mips_div_s ,
  mips_div_d ,
  mips_divu ,
  mips_ehb ,
  mips_ei ,
  mips_eret ,
  mips_ext ,
  mips_floor_l_s ,
  mips_floor_l_d ,
  mips_floor_w_s ,
  mips_floor_w_d ,
  mips_ins ,
  mips_j ,
  mips_jal ,
  mips_jalr ,
  mips_jalr_hb ,
  mips_jalx ,
  mips_jr ,
  mips_jr_hb ,
  mips_lb ,
  mips_lbe ,
  mips_lbu ,
  mips_lbue ,
  mips_ldc1 ,
  mips_ldc2 ,
  mips_ldxc1 ,
  mips_lh ,
  mips_lhe ,
  mips_lhu ,
  mips_lhue ,
  mips_ll ,
  mips_lle ,
  mips_lui ,
  mips_luxc1 ,
  mips_lw ,
  mips_lwc1 ,
  mips_lwc2 ,
  mips_lwe ,
  mips_lwl ,
  mips_lwle ,
  mips_lwr ,
  mips_lwre ,
  mips_lwu ,
  mips_lwxc1 ,
  mips_madd ,
  mips_madd_s ,
  mips_madd_d ,
  mips_madd_ps ,
  mips_maddu ,
  mips_mfc0 ,
  mips_mfc1 ,
  mips_mfc2 ,
  mips_mfhc1 ,
  mips_mfhc2 ,
  mips_mfhi ,
  mips_mflo ,
  mips_mov_s ,
  mips_mov_d ,
  mips_mov_ps ,
  mips_movf ,
  mips_movf_s ,
  mips_movf_d ,
  mips_movf_ps ,
  mips_movn ,
  mips_movn_s ,
  mips_movn_d ,
  mips_movn_ps ,
  mips_movt ,
  mips_movt_s ,
  mips_movt_d ,
  mips_movt_ps ,
  mips_movz ,
  mips_movz_s ,
  mips_movz_d ,
  mips_movz_ps ,
  mips_msub ,
  mips_msub_s ,
  mips_msub_d ,
  mips_msub_ps ,
  mips_msubu ,
  mips_mtc0 ,
  mips_mtc1 ,
  mips_mtc2 ,
  mips_mthc1 ,
  mips_mthc2 ,
  mips_mthi ,
  mips_mtlo ,
  mips_mul ,
  mips_mul_s ,
  mips_mul_d ,
  mips_mul_ps ,
  mips_mult ,
  mips_multu ,
  mips_neg_s ,
  mips_neg_d ,
  mips_neg_ps ,
  mips_nmadd_s ,
  mips_nmadd_d ,
  mips_nmadd_ps ,
  mips_nmsub_s ,
  mips_nmsub_d ,
  mips_nmsub_ps ,
  mips_nop ,
  mips_nor ,
  mips_or ,
  mips_ori ,
  mips_pause ,
  mips_pll_ps ,
  mips_plu_ps ,
  mips_pref ,
  mips_prefe ,
  mips_prefx ,
  mips_pul_ps ,
  mips_puu_ps ,
  mips_rdhwr ,
  mips_rdpgpr ,
  mips_recip_s ,
  mips_recip_d ,
  mips_rotr ,
  mips_rotrv ,
  mips_round_l_s ,
  mips_round_l_d ,
  mips_round_w_s ,
  mips_round_w_d ,
  mips_rsqrt_s ,
  mips_rsqrt_d ,
  mips_sb ,
  mips_sbe ,
  mips_sc ,
  mips_sce ,
  mips_sdc1 ,
  mips_sdc2 ,
  mips_sdxc1 ,
  mips_seb ,
  mips_seh ,
  mips_sh ,
  mips_she ,
  mips_sll ,
  mips_sllv ,
  mips_slt ,
  mips_slti ,
  mips_sltiu ,
  mips_sltu ,
  mips_sqrt_s ,
  mips_sqrt_d ,
  mips_sra ,
  mips_srav ,
  mips_srl ,
  mips_srlv ,
  mips_ssnop ,
  mips_sub ,
  mips_sub_s ,
  mips_sub_d ,
  mips_sub_ps ,
  mips_subu ,
  mips_suxc1 ,
  mips_sw ,
  mips_swc1 ,
  mips_swc2 ,
  mips_swe ,
  mips_swl ,
  mips_swle ,
  mips_swr ,
  mips_swre ,
  mips_swxc1 ,
  mips_sync ,
  mips_synci ,
  mips_syscall ,
  mips_teq ,
  mips_teqi ,
  mips_tge ,
  mips_tgei ,
  mips_tgeiu ,
  mips_tgeu ,
  mips_tlbinv ,
  mips_tlbinvf ,
  mips_tlbp ,
  mips_tlbr ,
  mips_tlbwi ,
  mips_tlbwr ,
  mips_tlt ,
  mips_tlti ,
  mips_tltiu ,
  mips_tltu ,
  mips_tne ,
  mips_tnei ,
  mips_trunc_l_s ,
  mips_trunc_l_d ,
  mips_trunc_w_s ,
  mips_trunc_w_d ,
  mips_wait ,
  mips_wrpgpr ,
  mips_wsbh ,
  mips_xor ,
  mips_xori ,
  mips_last_instruction
}
 
enum  PowerpcCapability {
  powerpc_capability_uisa = 0x00000001 ,
  powerpc_capability_vea = 0x00000002 ,
  powerpc_capability_oea = 0x00000004 ,
  powerpc_capability_440fpu = 0x00000008 ,
  powerpc_capability_uncategorized = 0x00000010 ,
  powerpc_capability_default = 0x00000017 ,
  powerpc_capability_all = 0x0000001f
}
 Subsets for the PowerPC instruction set. More...
 
enum  PowerpcWordSize {
  powerpc_32 ,
  powerpc_64
}
 
enum  PowerpcInstructionKind {
  powerpc_unknown_instruction = 0 ,
  powerpc_add ,
  powerpc_add_record ,
  powerpc_addo ,
  powerpc_addo_record ,
  powerpc_addc ,
  powerpc_addc_record ,
  powerpc_addco ,
  powerpc_addco_record ,
  powerpc_adde ,
  powerpc_adde_record ,
  powerpc_addeo ,
  powerpc_addeo_record ,
  powerpc_addi ,
  powerpc_addic ,
  powerpc_addic_record ,
  powerpc_addis ,
  powerpc_addme ,
  powerpc_addme_record ,
  powerpc_addmeo ,
  powerpc_addmeo_record ,
  powerpc_addze ,
  powerpc_addze_record ,
  powerpc_addzeo ,
  powerpc_addzeo_record ,
  powerpc_and ,
  powerpc_and_record ,
  powerpc_andc ,
  powerpc_andc_record ,
  powerpc_andi_record ,
  powerpc_andis_record ,
  powerpc_b ,
  powerpc_ba ,
  powerpc_bl ,
  powerpc_bla ,
  powerpc_bc ,
  powerpc_bca ,
  powerpc_bcl ,
  powerpc_bcla ,
  powerpc_bcctr ,
  powerpc_bcctrl ,
  powerpc_bclr ,
  powerpc_bclrl ,
  powerpc_cmp ,
  powerpc_cmpi ,
  powerpc_cmpl ,
  powerpc_cmpli ,
  powerpc_cntlzd ,
  powerpc_cntlzd_record ,
  powerpc_cntlzw ,
  powerpc_cntlzw_record ,
  powerpc_crand ,
  powerpc_crandc ,
  powerpc_creqv ,
  powerpc_crnand ,
  powerpc_crnor ,
  powerpc_cror ,
  powerpc_crorc ,
  powerpc_crxor ,
  powerpc_dcbf ,
  powerpc_dcba ,
  powerpc_dcbi ,
  powerpc_dcbst ,
  powerpc_dcbt ,
  powerpc_dcbtst ,
  powerpc_dcbz ,
  powerpc_divd ,
  powerpc_divd_record ,
  powerpc_divdo ,
  powerpc_divdo_record ,
  powerpc_divdu ,
  powerpc_divdu_record ,
  powerpc_divduo ,
  powerpc_divduo_record ,
  powerpc_divw ,
  powerpc_divw_record ,
  powerpc_divwo ,
  powerpc_divwo_record ,
  powerpc_divwu ,
  powerpc_divwu_record ,
  powerpc_divwuo ,
  powerpc_divwuo_record ,
  powerpc_dst ,
  powerpc_dstt ,
  powerpc_dstst ,
  powerpc_dststt ,
  powerpc_dss ,
  powerpc_dssall ,
  powerpc_eciwx ,
  powerpc_ecowx ,
  powerpc_eieio ,
  powerpc_eqv ,
  powerpc_eqv_record ,
  powerpc_extsb ,
  powerpc_extsb_record ,
  powerpc_extsh ,
  powerpc_extsh_record ,
  powerpc_extsw ,
  powerpc_extsw_record ,
  powerpc_fabs ,
  powerpc_fabs_record ,
  powerpc_fadd ,
  powerpc_fadd_record ,
  powerpc_fadds ,
  powerpc_fadds_record ,
  powerpc_fcfid ,
  powerpc_fcfid_record ,
  powerpc_fcmpo ,
  powerpc_fcmpu ,
  powerpc_fctid ,
  powerpc_fctid_record ,
  powerpc_fctidz ,
  powerpc_fctidz_record ,
  powerpc_fctiw ,
  powerpc_fctiw_record ,
  powerpc_fctiwz ,
  powerpc_fctiwz_record ,
  powerpc_fdiv ,
  powerpc_fdiv_record ,
  powerpc_fdivs ,
  powerpc_fdivs_record ,
  powerpc_fmadd ,
  powerpc_fmadd_record ,
  powerpc_fmadds ,
  powerpc_fmadds_record ,
  powerpc_fmr ,
  powerpc_fmr_record ,
  powerpc_fmsub ,
  powerpc_fmsub_record ,
  powerpc_fmsubs ,
  powerpc_fmsubs_record ,
  powerpc_fmul ,
  powerpc_fmul_record ,
  powerpc_fmuls ,
  powerpc_fmuls_record ,
  powerpc_fnabs ,
  powerpc_fnabs_record ,
  powerpc_fneg ,
  powerpc_fneg_record ,
  powerpc_fnmadd ,
  powerpc_fnmadd_record ,
  powerpc_fnmadds ,
  powerpc_fnmadds_record ,
  powerpc_fnmsub ,
  powerpc_fnmsub_record ,
  powerpc_fnmsubs ,
  powerpc_fnmsubs_record ,
  powerpc_fpmul ,
  powerpc_fxmul ,
  powerpc_fxpmul ,
  powerpc_fxsmul ,
  powerpc_fpadd ,
  powerpc_fpsub ,
  powerpc_fpre ,
  powerpc_fprsqrte ,
  powerpc_fpmr ,
  powerpc_fpabs ,
  powerpc_lfssx ,
  powerpc_fpneg ,
  powerpc_lfssux ,
  powerpc_fprsp ,
  powerpc_lfsdx ,
  powerpc_fpnabs ,
  powerpc_lfsdux ,
  powerpc_lfxsx ,
  powerpc_fsmr ,
  powerpc_lfxsux ,
  powerpc_lfxdx ,
  powerpc_fsabs ,
  powerpc_lfxdux ,
  powerpc_lfpsx ,
  powerpc_fsneg ,
  powerpc_lfpsux ,
  powerpc_lfpdx ,
  powerpc_fsnabs ,
  powerpc_lfpdux ,
  powerpc_stfpiwx ,
  powerpc_fxmr ,
  powerpc_fpctiw ,
  powerpc_stfssx ,
  powerpc_stfssux ,
  powerpc_fpctiwz ,
  powerpc_stfsdx ,
  powerpc_stfsdux ,
  powerpc_stfxsx ,
  powerpc_fsmtp ,
  powerpc_stfxsux ,
  powerpc_stfxdx ,
  powerpc_stfxdux ,
  powerpc_stfpsx ,
  powerpc_fsmfp ,
  powerpc_stfpsux ,
  powerpc_stfpdx ,
  powerpc_stfpdux ,
  powerpc_fpsel ,
  powerpc_fpmadd ,
  powerpc_fpmsub ,
  powerpc_fxmadd ,
  powerpc_fxcpmadd ,
  powerpc_fxcsmadd ,
  powerpc_fpnmadd ,
  powerpc_fxnmadd ,
  powerpc_fxcpnmadd ,
  powerpc_fxcsnmadd ,
  powerpc_fxcpnpma ,
  powerpc_fxmsub ,
  powerpc_fxcsnpma ,
  powerpc_fxcpmsub ,
  powerpc_fxcpnsma ,
  powerpc_fxcsmsub ,
  powerpc_fxcsnsma ,
  powerpc_fpnmsub ,
  powerpc_fxcxma ,
  powerpc_fxnmsub ,
  powerpc_fxcxnpma ,
  powerpc_fxcpnmsub ,
  powerpc_fxcxnsma ,
  powerpc_fxcsnmsub ,
  powerpc_fxcxnms ,
  powerpc_fre ,
  powerpc_fre_record ,
  powerpc_fres ,
  powerpc_fres_record ,
  powerpc_frsp ,
  powerpc_frsp_record ,
  powerpc_frsqrte ,
  powerpc_frsqrte_record ,
  powerpc_frsqrtes ,
  powerpc_frsqrtes_record ,
  powerpc_fsel ,
  powerpc_fsel_record ,
  powerpc_fsqrt ,
  powerpc_fsqrt_record ,
  powerpc_fsqrts ,
  powerpc_fsqrts_record ,
  powerpc_fsub ,
  powerpc_fsub_record ,
  powerpc_fsubs ,
  powerpc_fsubs_record ,
  powerpc_icbi ,
  powerpc_illegal ,
  powerpc_isync ,
  powerpc_lbz ,
  powerpc_lbzu ,
  powerpc_lbzux ,
  powerpc_lbzx ,
  powerpc_ld ,
  powerpc_ldarx ,
  powerpc_ldu ,
  powerpc_ldux ,
  powerpc_ldx ,
  powerpc_lfd ,
  powerpc_lfdu ,
  powerpc_lfdux ,
  powerpc_lfdx ,
  powerpc_lfs ,
  powerpc_lfsu ,
  powerpc_lfsux ,
  powerpc_lfsx ,
  powerpc_lha ,
  powerpc_lhau ,
  powerpc_lhaux ,
  powerpc_lhax ,
  powerpc_lhbrx ,
  powerpc_lhz ,
  powerpc_lhzu ,
  powerpc_lhzux ,
  powerpc_lhzx ,
  powerpc_lmw ,
  powerpc_lswi ,
  powerpc_lswx ,
  powerpc_lwa ,
  powerpc_lwarx ,
  powerpc_lwaux ,
  powerpc_lwax ,
  powerpc_lwbrx ,
  powerpc_lwz ,
  powerpc_lwzu ,
  powerpc_lwzux ,
  powerpc_lwzx ,
  powerpc_mcrf ,
  powerpc_mcrfs ,
  powerpc_mcrxr ,
  powerpc_mfcr ,
  powerpc_mffs ,
  powerpc_mffs_record ,
  powerpc_mfmsr ,
  powerpc_mfspr ,
  powerpc_mfsr ,
  powerpc_mfsrin ,
  powerpc_mftb ,
  powerpc_mtcrf ,
  powerpc_mtfsb0 ,
  powerpc_mtfsb0_record ,
  powerpc_mtfsb1 ,
  powerpc_mtfsb1_record ,
  powerpc_mtfsf ,
  powerpc_mtfsf_record ,
  powerpc_mtfsfi ,
  powerpc_mtfsfi_record ,
  powerpc_mtmsr ,
  powerpc_mtmsrd ,
  powerpc_mtspr ,
  powerpc_mtsr ,
  powerpc_mtsrd ,
  powerpc_mtsrdin ,
  powerpc_mtsrin ,
  powerpc_mulhd ,
  powerpc_mulhd_record ,
  powerpc_mulhdu ,
  powerpc_mulhdu_record ,
  powerpc_mulhw ,
  powerpc_mulhw_record ,
  powerpc_mulhwu ,
  powerpc_mulhwu_record ,
  powerpc_mulld ,
  powerpc_mulld_record ,
  powerpc_mulldo ,
  powerpc_mulldo_record ,
  powerpc_mulli ,
  powerpc_mullw ,
  powerpc_mullw_record ,
  powerpc_mullwo ,
  powerpc_mullwo_record ,
  powerpc_nand ,
  powerpc_nand_record ,
  powerpc_neg ,
  powerpc_neg_record ,
  powerpc_nego ,
  powerpc_nego_record ,
  powerpc_nor ,
  powerpc_nor_record ,
  powerpc_or ,
  powerpc_or_record ,
  powerpc_orc ,
  powerpc_orc_record ,
  powerpc_ori ,
  powerpc_oris ,
  powerpc_popcntb ,
  powerpc_rfi ,
  powerpc_rfid ,
  powerpc_rldcl ,
  powerpc_rldcl_record ,
  powerpc_rldcr ,
  powerpc_rldcr_record ,
  powerpc_rldic ,
  powerpc_rldic_record ,
  powerpc_rldicl ,
  powerpc_rldicl_record ,
  powerpc_rldicr ,
  powerpc_rldicr_record ,
  powerpc_rldimi ,
  powerpc_rldimi_record ,
  powerpc_rlwimi ,
  powerpc_rlwimi_record ,
  powerpc_rlwinm ,
  powerpc_rlwinm_record ,
  powerpc_rlwnm ,
  powerpc_rlwnm_record ,
  powerpc_sc ,
  powerpc_slbia ,
  powerpc_slbie ,
  powerpc_sld ,
  powerpc_sld_record ,
  powerpc_slw ,
  powerpc_slw_record ,
  powerpc_srad ,
  powerpc_srad_record ,
  powerpc_sradi ,
  powerpc_sradi_record ,
  powerpc_srd ,
  powerpc_srd_record ,
  powerpc_sraw ,
  powerpc_sraw_record ,
  powerpc_srawi ,
  powerpc_srawi_record ,
  powerpc_srw ,
  powerpc_srw_record ,
  powerpc_stb ,
  powerpc_stbu ,
  powerpc_stbux ,
  powerpc_stbx ,
  powerpc_std ,
  powerpc_stdcx_record ,
  powerpc_stdu ,
  powerpc_stdux ,
  powerpc_stdx ,
  powerpc_stfd ,
  powerpc_stfdu ,
  powerpc_stfdux ,
  powerpc_stfdx ,
  powerpc_stfiwx ,
  powerpc_stfs ,
  powerpc_stfsu ,
  powerpc_stfsux ,
  powerpc_stfsx ,
  powerpc_sth ,
  powerpc_sthbrx ,
  powerpc_sthu ,
  powerpc_sthux ,
  powerpc_sthx ,
  powerpc_stmw ,
  powerpc_stswi ,
  powerpc_stswx ,
  powerpc_stw ,
  powerpc_stwbrx ,
  powerpc_stwcx_record ,
  powerpc_stwu ,
  powerpc_stwux ,
  powerpc_stwx ,
  powerpc_subf ,
  powerpc_subf_record ,
  powerpc_subfo ,
  powerpc_subfo_record ,
  powerpc_subfc ,
  powerpc_subfc_record ,
  powerpc_subfco ,
  powerpc_subfco_record ,
  powerpc_subfe ,
  powerpc_subfe_record ,
  powerpc_subfeo ,
  powerpc_subfeo_record ,
  powerpc_subfic ,
  powerpc_subfme ,
  powerpc_subfme_record ,
  powerpc_subfmeo ,
  powerpc_subfmeo_record ,
  powerpc_subfze ,
  powerpc_subfze_record ,
  powerpc_subfzeo ,
  powerpc_subfzeo_record ,
  powerpc_sync ,
  powerpc_td ,
  powerpc_tdi ,
  powerpc_tlbia ,
  powerpc_tlbie ,
  powerpc_tlbsync ,
  powerpc_tw ,
  powerpc_twi ,
  powerpc_xor ,
  powerpc_xor_record ,
  powerpc_xori ,
  powerpc_xoris ,
  powerpc_last_instruction
}
 
enum  PowerpcRegisterClass {
  powerpc_regclass_unknown ,
  powerpc_regclass_gpr ,
  powerpc_regclass_fpr ,
  powerpc_regclass_cr ,
  powerpc_regclass_fpscr ,
  powerpc_regclass_spr ,
  powerpc_regclass_tbr ,
  powerpc_regclass_msr ,
  powerpc_regclass_sr ,
  powerpc_regclass_iar ,
  powerpc_regclass_pvr ,
  powerpc_last_register_class
}
 
enum  PowerpcConditionRegisterAccessGranularity {
  powerpc_condreggranularity_whole ,
  powerpc_condreggranularity_field ,
  powerpc_condreggranularity_bit
}
 
enum  PowerpcSpecialPurposeRegister {
  powerpc_spr_xer = 1 ,
  powerpc_spr_lr = 8 ,
  powerpc_spr_ctr = 9 ,
  powerpc_spr_dsisr = 18 ,
  powerpc_spr_dar = 19 ,
  powerpc_spr_dec = 22
}
 
enum  PowerpcTimeBaseRegister {
  powerpc_tbr_tbl = 268 ,
  powerpc_tbr_tbu = 269
}
 
enum  X86InstructionSize {
  x86_insnsize_none ,
  x86_insnsize_16 ,
  x86_insnsize_32 ,
  x86_insnsize_64
}
 
enum  X86RegisterClass {
  x86_regclass_gpr ,
  x86_regclass_segment ,
  x86_regclass_cr ,
  x86_regclass_dr ,
  x86_regclass_st ,
  x86_regclass_xmm ,
  x86_regclass_ip ,
  x86_regclass_flags
}
 
enum  X86SegmentRegister {
  x86_segreg_es = 0 ,
  x86_segreg_cs = 1 ,
  x86_segreg_ss = 2 ,
  x86_segreg_ds = 3 ,
  x86_segreg_fs = 4 ,
  x86_segreg_gs = 5 ,
  x86_segreg_none = 16
}
 
enum  X86GeneralPurposeRegister {
  x86_gpr_ax = 0 ,
  x86_gpr_cx = 1 ,
  x86_gpr_dx = 2 ,
  x86_gpr_bx = 3 ,
  x86_gpr_sp = 4 ,
  x86_gpr_bp = 5 ,
  x86_gpr_si = 6 ,
  x86_gpr_di = 7 ,
  x86_gpr_r8 = 8 ,
  x86_gpr_r9 = 9 ,
  x86_gpr_r10 = 10 ,
  x86_gpr_r11 = 11 ,
  x86_gpr_r12 = 12 ,
  x86_gpr_r13 = 13 ,
  x86_gpr_r14 = 14 ,
  x86_gpr_r15 = 15
}
 
enum  X86StRegister {
  x86_st_0 = 0 ,
  x86_st_1 = 1 ,
  x86_st_2 = 2 ,
  x86_st_3 = 3 ,
  x86_st_4 = 4 ,
  x86_st_5 = 5 ,
  x86_st_6 = 6 ,
  x86_st_7 = 7 ,
  x86_st_nregs = 8
}
 
enum  X86Flags {
  x86_flags_status = 0 ,
  x86_flags_fpstatus = 1 ,
  x86_flags_fptag = 2 ,
  x86_flags_fpctl = 3 ,
  x86_flags_mxcsr = 4
}
 
enum  X86Flag {
  x86_flag_cf = 0 ,
  x86_flag_pf = 2 ,
  x86_flag_af = 4 ,
  x86_flag_zf = 6 ,
  x86_flag_sf = 7 ,
  x86_flag_tf = 8 ,
  x86_flag_if = 9 ,
  x86_flag_df = 10 ,
  x86_flag_of = 11 ,
  x86_flag_iopl = 12 ,
  x86_flag_nt = 14 ,
  x86_flag_rf = 16 ,
  x86_flag_vm = 17 ,
  x86_flag_ac = 18 ,
  x86_flag_vif = 19 ,
  x86_flag_vip = 20 ,
  x86_flag_id = 21
}
 
enum  X86BranchPrediction {
  x86_branch_prediction_none ,
  x86_branch_prediction_taken ,
  x86_branch_prediction_not_taken
}
 
enum  X86RepeatPrefix {
  x86_repeat_none ,
  x86_repeat_repne ,
  x86_repeat_repe
}
 
enum  X86Exception {
  x86_exception_int ,
  x86_exception_sysenter ,
  x86_exception_syscall ,
  x86_exception_de ,
  x86_exception_db ,
  x86_exception_bp ,
  x86_exception_of ,
  x86_exception_br ,
  x86_exception_ud ,
  x86_exception_nm ,
  x86_exception_df ,
  x86_exception_ts ,
  x86_exception_np ,
  x86_exception_ss ,
  x86_exception_gp ,
  x86_exception_pf ,
  x86_exception_mf ,
  x86_exception_ac ,
  x86_exception_mc ,
  x86_exception_xm
}
 
enum  X86InstructionKind {
  x86_unknown_instruction = 0x0000 ,
  x86_aaa = 0x0001 ,
  x86_aad = 0x0002 ,
  x86_aam = 0x0003 ,
  x86_aas = 0x0004 ,
  x86_adc = 0x0005 ,
  x86_add = 0x0006 ,
  x86_addpd = 0x0007 ,
  x86_addps = 0x0008 ,
  x86_addsd = 0x0009 ,
  x86_addss = 0x000a ,
  x86_addsubpd = 0x000b ,
  x86_addsubps = 0x000c ,
  x86_and = 0x000d ,
  x86_andnpd = 0x000e ,
  x86_andnps = 0x000f ,
  x86_andpd = 0x0010 ,
  x86_andps = 0x0011 ,
  x86_arpl = 0x0012 ,
  x86_blendpd = 0x0013 ,
  x86_blendps = 0x0014 ,
  x86_blendvpd = 0x0015 ,
  x86_blendvps = 0x0016 ,
  x86_bound = 0x0017 ,
  x86_bsf = 0x0018 ,
  x86_bsr = 0x0019 ,
  x86_bswap = 0x001a ,
  x86_bt = 0x001b ,
  x86_btc = 0x001c ,
  x86_btr = 0x001d ,
  x86_bts = 0x001e ,
  x86_call = 0x001f ,
  x86_cbw = 0x0020 ,
  x86_cdq = 0x0021 ,
  x86_cdqe = 0x0022 ,
  x86_clc = 0x0023 ,
  x86_cld = 0x0024 ,
  x86_clflush = 0x0025 ,
  x86_clgi = 0x0026 ,
  x86_cli = 0x0027 ,
  x86_clts = 0x0028 ,
  x86_cmc = 0x0029 ,
  x86_cmova = 0x002a ,
  x86_cmovae = 0x002b ,
  x86_cmovb = 0x002c ,
  x86_cmovbe = 0x002d ,
  x86_cmove = 0x002e ,
  x86_cmovg = 0x002f ,
  x86_cmovge = 0x0030 ,
  x86_cmovl = 0x0031 ,
  x86_cmovle = 0x0032 ,
  x86_cmovne = 0x0033 ,
  x86_cmovno = 0x0034 ,
  x86_cmovns = 0x0035 ,
  x86_cmovo = 0x0036 ,
  x86_cmovpe = 0x0037 ,
  x86_cmovpo = 0x0038 ,
  x86_cmovs = 0x0039 ,
  x86_cmp = 0x003a ,
  x86_cmppd = 0x003b ,
  x86_cmpps = 0x003c ,
  x86_cmpsb = 0x003d ,
  x86_cmpsd = 0x003e ,
  x86_cmpsq = 0x003f ,
  x86_cmpss = 0x0040 ,
  x86_cmpsw = 0x0041 ,
  x86_cmpxchg = 0x0042 ,
  x86_cmpxchg16b = 0x0043 ,
  x86_cmpxchg8b = 0x0044 ,
  x86_comisd = 0x0045 ,
  x86_comiss = 0x0046 ,
  x86_cpuid = 0x0047 ,
  x86_cqo = 0x0048 ,
  x86_crc32 = 0x0049 ,
  x86_cvtdq2pd = 0x004a ,
  x86_cvtdq2ps = 0x004b ,
  x86_cvtpd2dq = 0x004c ,
  x86_cvtpd2pi = 0x004d ,
  x86_cvtpd2ps = 0x004e ,
  x86_cvtpi2pd = 0x004f ,
  x86_cvtpi2ps = 0x0050 ,
  x86_cvtps2dq = 0x0051 ,
  x86_cvtps2pd = 0x0052 ,
  x86_cvtps2pi = 0x0053 ,
  x86_cvtsd2si = 0x0054 ,
  x86_cvtsd2ss = 0x0055 ,
  x86_cvtsi2sd = 0x0056 ,
  x86_cvtsi2ss = 0x0057 ,
  x86_cvtss2sd = 0x0058 ,
  x86_cvtss2si = 0x0059 ,
  x86_cvttpd2dq = 0x005a ,
  x86_cvttpd2pi = 0x005b ,
  x86_cvttps2dq = 0x005c ,
  x86_cvttps2pi = 0x005d ,
  x86_cvttsd2si = 0x005e ,
  x86_cvttss2si = 0x005f ,
  x86_cwd = 0x0060 ,
  x86_cwde = 0x0061 ,
  x86_daa = 0x0062 ,
  x86_das = 0x0063 ,
  x86_dec = 0x0064 ,
  x86_div = 0x0065 ,
  x86_divpd = 0x0066 ,
  x86_divps = 0x0067 ,
  x86_divsd = 0x0068 ,
  x86_divss = 0x0069 ,
  x86_dppd = 0x006a ,
  x86_dpps = 0x006b ,
  x86_emms = 0x006c ,
  x86_enter = 0x006d ,
  x86_extractps = 0x006e ,
  x86_extrq = 0x006f ,
  x86_f2xm1 = 0x0070 ,
  x86_fabs = 0x0071 ,
  x86_fadd = 0x0072 ,
  x86_faddp = 0x0073 ,
  x86_farcall = 0x0074 ,
  x86_farjmp = 0x0075 ,
  x86_fbld = 0x0076 ,
  x86_fbstp = 0x0077 ,
  x86_fchs = 0x0078 ,
  x86_fcmovb = 0x0079 ,
  x86_fcmovbe = 0x007a ,
  x86_fcmove = 0x007b ,
  x86_fcmovnb = 0x007c ,
  x86_fcmovnbe = 0x007d ,
  x86_fcmovne = 0x007e ,
  x86_fcmovnu = 0x007f ,
  x86_fcmovu = 0x0080 ,
  x86_fcom = 0x0081 ,
  x86_fcomi = 0x0082 ,
  x86_fcomip = 0x0083 ,
  x86_fcomp = 0x0084 ,
  x86_fcompp = 0x0085 ,
  x86_fcos = 0x0086 ,
  x86_fdecstp = 0x0087 ,
  x86_fdiv = 0x0088 ,
  x86_fdivp = 0x0089 ,
  x86_fdivr = 0x008a ,
  x86_fdivrp = 0x008b ,
  x86_femms = 0x008c ,
  x86_ffree = 0x008d ,
  x86_fiadd = 0x008e ,
  x86_ficom = 0x008f ,
  x86_ficomp = 0x0090 ,
  x86_fidiv = 0x0091 ,
  x86_fidivr = 0x0092 ,
  x86_fild = 0x0093 ,
  x86_fimul = 0x0094 ,
  x86_fincstp = 0x0095 ,
  x86_fist = 0x0096 ,
  x86_fistp = 0x0097 ,
  x86_fisttp = 0x0098 ,
  x86_fisub = 0x0099 ,
  x86_fisubr = 0x009a ,
  x86_fld = 0x009b ,
  x86_fld1 = 0x009c ,
  x86_fldcw = 0x009d ,
  x86_fldenv = 0x009e ,
  x86_fldl2e = 0x009f ,
  x86_fldl2t = 0x00a0 ,
  x86_fldlg2 = 0x00a1 ,
  x86_fldln2 = 0x00a2 ,
  x86_fldpi = 0x00a3 ,
  x86_fldz = 0x00a4 ,
  x86_fmul = 0x00a5 ,
  x86_fmulp = 0x00a6 ,
  x86_fnclex = 0x00a7 ,
  x86_fninit = 0x00a8 ,
  x86_fnop = 0x00a9 ,
  x86_fnsave = 0x00aa ,
  x86_fnstcw = 0x00ab ,
  x86_fnstenv = 0x00ac ,
  x86_fnstsw = 0x00ad ,
  x86_fpatan = 0x00ae ,
  x86_fprem = 0x00af ,
  x86_fprem1 = 0x00b0 ,
  x86_fptan = 0x00b1 ,
  x86_frndint = 0x00b2 ,
  x86_frstor = 0x00b3 ,
  x86_fscale = 0x00b4 ,
  x86_fsin = 0x00b5 ,
  x86_fsincos = 0x00b6 ,
  x86_fsqrt = 0x00b7 ,
  x86_fst = 0x00b8 ,
  x86_fstp = 0x00b9 ,
  x86_fsub = 0x00ba ,
  x86_fsubp = 0x00bb ,
  x86_fsubr = 0x00bc ,
  x86_fsubrp = 0x00bd ,
  x86_ftst = 0x00be ,
  x86_fucom = 0x00bf ,
  x86_fucomi = 0x00c0 ,
  x86_fucomip = 0x00c1 ,
  x86_fucomp = 0x00c2 ,
  x86_fucompp = 0x00c3 ,
  x86_fwait = 0x00c4 ,
  x86_fxam = 0x00c5 ,
  x86_fxch = 0x00c6 ,
  x86_fxrstor = 0x00c7 ,
  x86_fxsave = 0x00c8 ,
  x86_fxtract = 0x00c9 ,
  x86_fyl2x = 0x00ca ,
  x86_fyl2xp1 = 0x00cb ,
  x86_getsec = 0x00cc ,
  x86_haddpd = 0x00cd ,
  x86_haddps = 0x00ce ,
  x86_hlt = 0x00cf ,
  x86_hsubpd = 0x00d0 ,
  x86_hsubps = 0x00d1 ,
  x86_idiv = 0x00d2 ,
  x86_imul = 0x00d3 ,
  x86_in = 0x00d4 ,
  x86_inc = 0x00d5 ,
  x86_insb = 0x00d6 ,
  x86_insd = 0x00d7 ,
  x86_insertps = 0x00d8 ,
  x86_insertq = 0x00d9 ,
  x86_insw = 0x00da ,
  x86_int = 0x00db ,
  x86_int1 = 0x00dc ,
  x86_int3 = 0x00dd ,
  x86_into = 0x00de ,
  x86_invd = 0x00df ,
  x86_invept = 0x00e0 ,
  x86_invlpg = 0x00e1 ,
  x86_invlpga = 0x00e2 ,
  x86_invvpid = 0x00e3 ,
  x86_iret = 0x00e4 ,
  x86_ja = 0x00e5 ,
  x86_jae = 0x00e6 ,
  x86_jb = 0x00e7 ,
  x86_jbe = 0x00e8 ,
  x86_jcxz = 0x00e9 ,
  x86_je = 0x00ea ,
  x86_jecxz = 0x00eb ,
  x86_jg = 0x00ec ,
  x86_jge = 0x00ed ,
  x86_jl = 0x00ee ,
  x86_jle = 0x00ef ,
  x86_jmp = 0x00f0 ,
  x86_jmpe = 0x00f1 ,
  x86_jne = 0x00f2 ,
  x86_jno = 0x00f3 ,
  x86_jns = 0x00f4 ,
  x86_jo = 0x00f5 ,
  x86_jpe = 0x00f6 ,
  x86_jpo = 0x00f7 ,
  x86_jrcxz = 0x00f8 ,
  x86_js = 0x00f9 ,
  x86_lahf = 0x00fa ,
  x86_lar = 0x00fb ,
  x86_lddqu = 0x00fc ,
  x86_ldmxcsr = 0x00fd ,
  x86_lds = 0x00fe ,
  x86_lea = 0x00ff ,
  x86_leave = 0x0100 ,
  x86_les = 0x0101 ,
  x86_lfence = 0x0102 ,
  x86_lfs = 0x0103 ,
  x86_lgdt = 0x0104 ,
  x86_lgs = 0x0105 ,
  x86_lidt = 0x0106 ,
  x86_lldt = 0x0107 ,
  x86_lmsw = 0x0108 ,
  x86_lock = 0x0109 ,
  x86_lodsb = 0x010a ,
  x86_lodsd = 0x010b ,
  x86_lodsq = 0x010c ,
  x86_lodsw = 0x010d ,
  x86_loop = 0x010e ,
  x86_loopnz = 0x010f ,
  x86_loopz = 0x0110 ,
  x86_lsl = 0x0111 ,
  x86_lss = 0x0112 ,
  x86_ltr = 0x0113 ,
  x86_lzcnt = 0x0114 ,
  x86_maskmovq = 0x0115 ,
  x86_maxpd = 0x0116 ,
  x86_maxps = 0x0117 ,
  x86_maxsd = 0x0118 ,
  x86_maxss = 0x0119 ,
  x86_mfence = 0x011a ,
  x86_minpd = 0x011b ,
  x86_minps = 0x011c ,
  x86_minsd = 0x011d ,
  x86_minss = 0x011e ,
  x86_monitor = 0x011f ,
  x86_mov = 0x0120 ,
  x86_movapd = 0x0121 ,
  x86_movaps = 0x0122 ,
  x86_movbe = 0x0123 ,
  x86_movd = 0x0124 ,
  x86_movddup = 0x0125 ,
  x86_movdq2q = 0x0126 ,
  x86_movdqa = 0x0127 ,
  x86_movdqu = 0x0128 ,
  x86_movhlps = 0x0129 ,
  x86_movhpd = 0x012a ,
  x86_movhps = 0x012b ,
  x86_movlhps = 0x012c ,
  x86_movlpd = 0x012d ,
  x86_movlps = 0x012e ,
  x86_movmskpd = 0x012f ,
  x86_movmskps = 0x0130 ,
  x86_movntdq = 0x0131 ,
  x86_movntdqa = 0x0132 ,
  x86_movnti = 0x0133 ,
  x86_movntpd = 0x0134 ,
  x86_movntps = 0x0135 ,
  x86_movntq = 0x0136 ,
  x86_movntsd = 0x0137 ,
  x86_movntss = 0x0138 ,
  x86_movq = 0x0139 ,
  x86_movq2dq = 0x013a ,
  x86_movsb = 0x013b ,
  x86_movsd = 0x013c ,
  x86_movsd_sse = 0x013d ,
  x86_movshdup = 0x013e ,
  x86_movsldup = 0x013f ,
  x86_movsq = 0x0140 ,
  x86_movss = 0x0141 ,
  x86_movsw = 0x0142 ,
  x86_movsx = 0x0143 ,
  x86_movsxd = 0x0144 ,
  x86_movupd = 0x0145 ,
  x86_movups = 0x0146 ,
  x86_movzx = 0x0147 ,
  x86_mpsadbw = 0x0148 ,
  x86_mul = 0x0149 ,
  x86_mulpd = 0x014a ,
  x86_mulps = 0x014b ,
  x86_mulsd = 0x014c ,
  x86_mulss = 0x014d ,
  x86_mwait = 0x014e ,
  x86_neg = 0x014f ,
  x86_nop = 0x0150 ,
  x86_not = 0x0151 ,
  x86_or = 0x0152 ,
  x86_orpd = 0x0153 ,
  x86_orps = 0x0154 ,
  x86_out = 0x0155 ,
  x86_outs = 0x0156 ,
  x86_outsb = 0x0157 ,
  x86_outsd = 0x0158 ,
  x86_outsw = 0x0159 ,
  x86_pabsb = 0x015a ,
  x86_pabsd = 0x015b ,
  x86_pabsw = 0x015c ,
  x86_packssdw = 0x015d ,
  x86_packsswb = 0x015e ,
  x86_packusdw = 0x015f ,
  x86_packuswb = 0x0160 ,
  x86_paddb = 0x0161 ,
  x86_paddd = 0x0162 ,
  x86_paddq = 0x0163 ,
  x86_paddsb = 0x0164 ,
  x86_paddsw = 0x0165 ,
  x86_paddusb = 0x0166 ,
  x86_paddusw = 0x0167 ,
  x86_paddw = 0x0168 ,
  x86_palignr = 0x0169 ,
  x86_pand = 0x016a ,
  x86_pandn = 0x016b ,
  x86_pause = 0x016c ,
  x86_pavgb = 0x016d ,
  x86_pavgusb = 0x016e ,
  x86_pavgw = 0x016f ,
  x86_pblendvb = 0x0170 ,
  x86_pblendw = 0x0171 ,
  x86_pcmpeqb = 0x0172 ,
  x86_pcmpeqd = 0x0173 ,
  x86_pcmpeqq = 0x0174 ,
  x86_pcmpeqw = 0x0175 ,
  x86_pcmpestri = 0x0176 ,
  x86_pcmpestrm = 0x0177 ,
  x86_pcmpgtb = 0x0178 ,
  x86_pcmpgtd = 0x0179 ,
  x86_pcmpgtq = 0x017a ,
  x86_pcmpgtw = 0x017b ,
  x86_pcmpistri = 0x017c ,
  x86_pcmpistrm = 0x017d ,
  x86_pextrb = 0x017e ,
  x86_pextrd = 0x017f ,
  x86_pextrq = 0x0180 ,
  x86_pextrw = 0x0181 ,
  x86_pf2id = 0x0182 ,
  x86_pf2iw = 0x0183 ,
  x86_pfacc = 0x0184 ,
  x86_pfadd = 0x0185 ,
  x86_pfcmpeq = 0x0186 ,
  x86_pfcmpge = 0x0187 ,
  x86_pfcmpgt = 0x0188 ,
  x86_pfmax = 0x0189 ,
  x86_pfmin = 0x018a ,
  x86_pfmul = 0x018b ,
  x86_pfnacc = 0x018c ,
  x86_pfpnacc = 0x018d ,
  x86_pfrcp = 0x018e ,
  x86_pfrcpit1 = 0x018f ,
  x86_pfrcpit2 = 0x0190 ,
  x86_pfrsqit1 = 0x0191 ,
  x86_pfrsqrt = 0x0192 ,
  x86_pfsub = 0x0193 ,
  x86_pfsubr = 0x0194 ,
  x86_phaddd = 0x0195 ,
  x86_phaddsw = 0x0196 ,
  x86_phaddw = 0x0197 ,
  x86_phminposuw = 0x0198 ,
  x86_phsubd = 0x0199 ,
  x86_phsubsw = 0x019a ,
  x86_phsubw = 0x019b ,
  x86_pi2fd = 0x019c ,
  x86_pi2fw = 0x019d ,
  x86_pinsrb = 0x019e ,
  x86_pinsrd = 0x019f ,
  x86_pinsrq = 0x01a0 ,
  x86_pinsrw = 0x01a1 ,
  x86_pmaddubsw = 0x01a2 ,
  x86_pmaddwd = 0x01a3 ,
  x86_pmaxsb = 0x01a4 ,
  x86_pmaxsd = 0x01a5 ,
  x86_pmaxsw = 0x01a6 ,
  x86_pmaxub = 0x01a7 ,
  x86_pmaxud = 0x01a8 ,
  x86_pmaxuw = 0x01a9 ,
  x86_pminsb = 0x01aa ,
  x86_pminsd = 0x01ab ,
  x86_pminsw = 0x01ac ,
  x86_pminub = 0x01ad ,
  x86_pminud = 0x01ae ,
  x86_pminuw = 0x01af ,
  x86_pmovmskb = 0x01b0 ,
  x86_pmovsxbd = 0x01b1 ,
  x86_pmovsxbq = 0x01b2 ,
  x86_pmovsxbw = 0x01b3 ,
  x86_pmovsxdq = 0x01b4 ,
  x86_pmovsxwd = 0x01b5 ,
  x86_pmovsxwq = 0x01b6 ,
  x86_pmovzxbd = 0x01b7 ,
  x86_pmovzxbq = 0x01b8 ,
  x86_pmovzxbw = 0x01b9 ,
  x86_pmovzxdq = 0x01ba ,
  x86_pmovzxwd = 0x01bb ,
  x86_pmovzxwq = 0x01bc ,
  x86_pmuldq = 0x01bd ,
  x86_pmulhrsw = 0x01be ,
  x86_pmulhrw = 0x01bf ,
  x86_pmulhuw = 0x01c0 ,
  x86_pmulhw = 0x01c1 ,
  x86_pmulld = 0x01c2 ,
  x86_pmullw = 0x01c3 ,
  x86_pmuludq = 0x01c4 ,
  x86_pop = 0x01c5 ,
  x86_popa = 0x01c6 ,
  x86_popad = 0x01c7 ,
  x86_popcnt = 0x01c8 ,
  x86_popf = 0x01c9 ,
  x86_popfd = 0x01ca ,
  x86_popfq = 0x01cb ,
  x86_por = 0x01cc ,
  x86_prefetch = 0x01cd ,
  x86_prefetchnta = 0x01ce ,
  x86_prefetcht0 = 0x01cf ,
  x86_prefetcht1 = 0x01d0 ,
  x86_prefetcht2 = 0x01d1 ,
  x86_prefetchw = 0x01d2 ,
  x86_psadbw = 0x01d3 ,
  x86_pshufb = 0x01d4 ,
  x86_pshufd = 0x01d5 ,
  x86_pshufhw = 0x01d6 ,
  x86_pshuflw = 0x01d7 ,
  x86_pshufw = 0x01d8 ,
  x86_psignb = 0x01d9 ,
  x86_psignd = 0x01da ,
  x86_psignw = 0x01db ,
  x86_pslld = 0x01dc ,
  x86_pslldq = 0x01dd ,
  x86_psllq = 0x01de ,
  x86_psllw = 0x01df ,
  x86_psrad = 0x01e0 ,
  x86_psraq = 0x01e1 ,
  x86_psraw = 0x01e2 ,
  x86_psrld = 0x01e3 ,
  x86_psrldq = 0x01e4 ,
  x86_psrlq = 0x01e5 ,
  x86_psrlw = 0x01e6 ,
  x86_psubb = 0x01e7 ,
  x86_psubd = 0x01e8 ,
  x86_psubq = 0x01e9 ,
  x86_psubsb = 0x01ea ,
  x86_psubsw = 0x01eb ,
  x86_psubusb = 0x01ec ,
  x86_psubusw = 0x01ed ,
  x86_psubw = 0x01ee ,
  x86_pswapd = 0x01ef ,
  x86_ptest = 0x01f0 ,
  x86_punpckhbw = 0x01f1 ,
  x86_punpckhdq = 0x01f2 ,
  x86_punpckhqdq = 0x01f3 ,
  x86_punpckhwd = 0x01f4 ,
  x86_punpcklbw = 0x01f5 ,
  x86_punpckldq = 0x01f6 ,
  x86_punpcklqdq = 0x01f7 ,
  x86_punpcklwd = 0x01f8 ,
  x86_push = 0x01f9 ,
  x86_pusha = 0x01fa ,
  x86_pushad = 0x01fb ,
  x86_pushf = 0x01fc ,
  x86_pushfd = 0x01fd ,
  x86_pushfq = 0x01fe ,
  x86_pxor = 0x01ff ,
  x86_rcl = 0x0200 ,
  x86_rcpps = 0x0201 ,
  x86_rcpss = 0x0202 ,
  x86_rcr = 0x0203 ,
  x86_rdmsr = 0x0204 ,
  x86_rdpmc = 0x0205 ,
  x86_rdtsc = 0x0206 ,
  x86_rdtscp = 0x0207 ,
  x86_rep_insb = 0x0208 ,
  x86_rep_insd = 0x0209 ,
  x86_rep_insw = 0x020a ,
  x86_rep_lodsb = 0x020b ,
  x86_rep_lodsd = 0x020c ,
  x86_rep_lodsq = 0x020d ,
  x86_rep_lodsw = 0x020e ,
  x86_rep_movsb = 0x020f ,
  x86_rep_movsd = 0x0210 ,
  x86_rep_movsq = 0x0211 ,
  x86_rep_movsw = 0x0212 ,
  x86_rep_outsb = 0x0213 ,
  x86_rep_outsd = 0x0214 ,
  x86_rep_outsw = 0x0215 ,
  x86_rep_stosb = 0x0216 ,
  x86_rep_stosd = 0x0217 ,
  x86_rep_stosq = 0x0218 ,
  x86_rep_stosw = 0x0219 ,
  x86_repe_cmpsb = 0x021a ,
  x86_repe_cmpsd = 0x021b ,
  x86_repe_cmpsq = 0x021c ,
  x86_repe_cmpsw = 0x021d ,
  x86_repe_scasb = 0x021e ,
  x86_repe_scasd = 0x021f ,
  x86_repe_scasq = 0x0220 ,
  x86_repe_scasw = 0x0221 ,
  x86_repne_cmpsb = 0x0222 ,
  x86_repne_cmpsd = 0x0223 ,
  x86_repne_cmpsq = 0x0224 ,
  x86_repne_cmpsw = 0x0225 ,
  x86_repne_scasb = 0x0226 ,
  x86_repne_scasd = 0x0227 ,
  x86_repne_scasq = 0x0228 ,
  x86_repne_scasw = 0x0229 ,
  x86_ret = 0x022a ,
  x86_retf = 0x022b ,
  x86_rol = 0x022c ,
  x86_ror = 0x022d ,
  x86_roundpd = 0x022e ,
  x86_roundps = 0x022f ,
  x86_roundsd = 0x0230 ,
  x86_roundss = 0x0231 ,
  x86_rsm = 0x0232 ,
  x86_rsqrtps = 0x0233 ,
  x86_rsqrtss = 0x0234 ,
  x86_sahf = 0x0235 ,
  x86_salc = 0x0236 ,
  x86_sar = 0x0237 ,
  x86_sbb = 0x0238 ,
  x86_scasb = 0x0239 ,
  x86_scasd = 0x023a ,
  x86_scasq = 0x023b ,
  x86_scasw = 0x023c ,
  x86_seta = 0x023d ,
  x86_setae = 0x023e ,
  x86_setb = 0x023f ,
  x86_setbe = 0x0240 ,
  x86_sete = 0x0241 ,
  x86_setg = 0x0242 ,
  x86_setge = 0x0243 ,
  x86_setl = 0x0244 ,
  x86_setle = 0x0245 ,
  x86_setne = 0x0246 ,
  x86_setno = 0x0247 ,
  x86_setns = 0x0248 ,
  x86_seto = 0x0249 ,
  x86_setpe = 0x024a ,
  x86_setpo = 0x024b ,
  x86_sets = 0x024c ,
  x86_sfence = 0x024d ,
  x86_sgdt = 0x024e ,
  x86_shl = 0x024f ,
  x86_shld = 0x0250 ,
  x86_shr = 0x0251 ,
  x86_shrd = 0x0252 ,
  x86_shufpd = 0x0253 ,
  x86_shufps = 0x0254 ,
  x86_sidt = 0x0255 ,
  x86_skinit = 0x0256 ,
  x86_sldt = 0x0257 ,
  x86_smsw = 0x0258 ,
  x86_sqrtpd = 0x0259 ,
  x86_sqrtps = 0x025a ,
  x86_sqrtsd = 0x025b ,
  x86_sqrtss = 0x025c ,
  x86_stc = 0x025d ,
  x86_std = 0x025e ,
  x86_stgi = 0x025f ,
  x86_sti = 0x0260 ,
  x86_stmxcsr = 0x0261 ,
  x86_stos = 0x0262 ,
  x86_stosb = 0x0263 ,
  x86_stosd = 0x0264 ,
  x86_stosq = 0x0265 ,
  x86_stosw = 0x0266 ,
  x86_str = 0x0267 ,
  x86_sub = 0x0268 ,
  x86_subpd = 0x0269 ,
  x86_subps = 0x026a ,
  x86_subsd = 0x026b ,
  x86_subss = 0x026c ,
  x86_swapgs = 0x026d ,
  x86_syscall = 0x026e ,
  x86_sysenter = 0x026f ,
  x86_sysexit = 0x0270 ,
  x86_sysret = 0x0271 ,
  x86_test = 0x0272 ,
  x86_ucomisd = 0x0273 ,
  x86_ucomiss = 0x0274 ,
  x86_ud2 = 0x0275 ,
  x86_unpckhpd = 0x0276 ,
  x86_unpckhps = 0x0277 ,
  x86_unpcklpd = 0x0278 ,
  x86_unpcklps = 0x0279 ,
  x86_verr = 0x027a ,
  x86_verw = 0x027b ,
  x86_vmcall = 0x027c ,
  x86_vmclear = 0x027d ,
  x86_vmlaunch = 0x027e ,
  x86_vmload = 0x027f ,
  x86_vmmcall = 0x0280 ,
  x86_vmoff = 0x0281 ,
  x86_vmptrld = 0x0282 ,
  x86_vmptrst = 0x0283 ,
  x86_vmread = 0x0284 ,
  x86_vmresume = 0x0285 ,
  x86_vmrun = 0x0286 ,
  x86_vmsave = 0x0287 ,
  x86_vmwrite = 0x0288 ,
  x86_vmxoff = 0x0289 ,
  x86_vmxon = 0x028a ,
  x86_wait = 0x028b ,
  x86_wbinvd = 0x028c ,
  x86_wrmsr = 0x028d ,
  x86_xadd = 0x028e ,
  x86_xchg = 0x028f ,
  x86_xgetbv = 0x0290 ,
  x86_xlatb = 0x0291 ,
  x86_xor = 0x0292 ,
  x86_xorpd = 0x0293 ,
  x86_xorps = 0x0294 ,
  x86_xrstor = 0x0295 ,
  x86_xsave = 0x0296 ,
  x86_xsetbv = 0x0297 ,
  x86_last_instruction = 0x0298
}
 List of all x86 instructions known to the ROSE disassembler/assembler. More...
 

Functions

std::ostream & operator<< (std::ostream &, const BinaryLoaderElf::VersionedSymbol &)
 
template<class V , class E >
Sawyer::Container::Graph< V, E >::VertexValue get_ast_node (const Sawyer::Container::Graph< V, E > &cfg, size_t vertexId)
 Return the AST node associated with a vertex.
 
template<class V , class E , class AstNode >
void put_ast_node (Sawyer::Container::Graph< V, E > &cfg, size_t vertexId, AstNode *astNode)
 Set the AST node associated with a vertex.
 
template<class A , class B , class C , class D , class E , class F , class G >
boost::property_traits< typenameboost::property_map< boost::adjacency_list< A, B, C, D, E, F, G >, boost::vertex_name_t >::type >::value_type get_ast_node (const boost::adjacency_list< A, B, C, D, E, F, G > &cfg, typename boost::graph_traits< boost::adjacency_list< A, B, C, D, E, F, G > >::vertex_descriptor vertex)
 
template<class A , class B , class C , class D , class E , class F , class G >
void put_ast_node (boost::adjacency_list< A, B, C, D, E, F, G > &cfg, typename boost::graph_traits< boost::adjacency_list< A, B, C, D, E, F, G > >::vertex_descriptor vertex, typename boost::property_traits< typename boost::property_map< boost::adjacency_list< A, B, C, D, E, F, G >, boost::vertex_name_t >::type >::value_type ast_node)
 
std::ostream & operator<< (std::ostream &, const FunctionSimilarity &)
 
template<typename T , typename U >
boost::enable_if_c< boost::is_integral< T >::value &&boost::is_integral< U >::value, T >::type alignUp (T address, U alignment)
 Align address downward to boundary.
 
template<typename T , typename U >
boost::enable_if_c< boost::is_integral< T >::value &&boost::is_integral< U >::value, T >::type alignDown (T address, U alignment)
 Align address upward to boundary.
 
std::ostream & operator<< (std::ostream &, const ReadWriteSets &)
 Print a read-write set.
 
std::ostream & operator<< (std::ostream &, const RegisterDictionary &)
 
bool listSmtSolverNames (std::ostream &)
 List known SMT solvers and their availability.
 
std::string validateSmtSolverName (const std::string &name)
 Validate SMT solver name.
 
std::string bestSmtSolverName ()
 SMT solver corresponding to "best".
 
void checkSmtCommandLineArg (const std::string &arg, const std::string &listSwitch, std::ostream &errorStream=std::cerr)
 Process SMT solver name from command-line.
 
std::string smtSolverDocumentationString (const std::string &dfltSolver)
 Documentation string for an SMT solver switch.
 
std::ostream & operator<< (std::ostream &, const SmtSolver::SExpr &)
 
std::ostream & operator<< (std::ostream &, const SourceLocations &)
 
std::ostream & operator<< (std::ostream &, const SymbolicExpressionParser::SyntaxError &)
 
std::ostream & operator<< (std::ostream &, const SymbolicExpressionParser::SubstitutionError &)
 
std::ostream & operator<< (std::ostream &out, const TaintedFlow::State &state)
 
bool x86InstructionIsConditionalFlagControlTransfer (SgAsmX86Instruction *inst)
 
bool x86InstructionIsConditionalFlagDataTransfer (SgAsmX86Instruction *inst)
 
bool x86InstructionIsConditionalControlTransfer (SgAsmX86Instruction *inst)
 
bool x86InstructionIsConditionalDataTransfer (SgAsmX86Instruction *inst)
 
bool x86InstructionIsPrivileged (SgAsmX86Instruction *)
 
bool x86InstructionIsFloatingPoint (SgAsmX86Instruction *)
 
bool x86InstructionIsConditionalFlagBitAndByte (SgAsmX86Instruction *inst)
 
bool x86InstructionIsUnconditionalBranch (SgAsmX86Instruction *inst)
 
bool x86InstructionIsConditionalBranch (SgAsmX86Instruction *inst)
 
bool x86InstructionIsDataTransfer (SgAsmX86Instruction *inst)
 
const char * gprToString (X86GeneralPurposeRegister n)
 
const char * segregToString (X86SegmentRegister n)
 
const char * flagToString (X86Flag n)
 
void hexdump (std::ostream &, rose_addr_t base_addr, const unsigned char *data, size_t data_sz, const HexdumpFormat &)
 Display binary data.
 
void hexdump (std::ostream &, rose_addr_t base_addr, const std::string &prefix, const SgUnsignedCharList &data, bool multiline=true)
 Display binary data.
 
void hexdump (std::ostream &, rose_addr_t base_addr, const std::string &prefix, const SgFileContentList &data, bool multiline=true)
 Display binary data.
 
std::string hexdump (rose_addr_t base_addr, const unsigned char *data, size_t data_sz, const HexdumpFormat &)
 Display binary data.
 
std::string hexdump (rose_addr_t base_addr, const std::string &prefix, const SgUnsignedCharList &data, bool multiline=true)
 Display binary data.
 
std::string hexdump (rose_addr_t base_addr, const std::string &prefix, const SgFileContentList &data, bool multiline=true)
 Display binary data.
 
void hexdump (FILE *, rose_addr_t base_addr, const unsigned char *data, size_t data_sz, const HexdumpFormat &)
 Display binary data.
 
void hexdump (FILE *, rose_addr_t base_addr, const std::string &prefix, const SgUnsignedCharList &data, bool multiline=true)
 Display binary data.
 
void hexdump (FILE *, rose_addr_t base_addr, const std::string &prefix, const SgFileContentList &data, bool multiline=true)
 Display binary data.
 

Typedef Documentation

◆ Address

using Rose::BinaryAnalysis::Address = typedef std::uint64_t

Address.

Definition at line 11 of file Address.h.

◆ AddressInterval

An interval of addresses.

Definition at line 13 of file AddressInterval.h.

◆ AddressIntervalSet

A set of virtual addresses.

This is optimized for cases when many addresses are contiguous.

Definition at line 13 of file AddressIntervalSet.h.

◆ AddressSet

Set of addresses.

Definition at line 13 of file AddressSet.h.

◆ BinaryLoaderPtr

Reference counting pointer.

Definition at line 22 of file Rose/BinaryAnalysis/BasicTypes.h.

◆ BinaryLoaderElfPtr

Reference counting pointer.

Definition at line 24 of file Rose/BinaryAnalysis/BasicTypes.h.

◆ BinaryLoaderElfObjPtr

Reference counting pointer.

Definition at line 26 of file Rose/BinaryAnalysis/BasicTypes.h.

◆ BinaryLoaderPePtr

Refernce counting pointer.

Definition at line 28 of file Rose/BinaryAnalysis/BasicTypes.h.

◆ MemoryMapPtr

Reference counting pointer.

Definition at line 41 of file Rose/BinaryAnalysis/BasicTypes.h.

◆ ReadWriteSetsPtr

using Rose::BinaryAnalysis::ReadWriteSetsPtr = typedef std::shared_ptr<ReadWriteSets>

Reference counting pointer.

Definition at line 45 of file Rose/BinaryAnalysis/BasicTypes.h.

◆ RegisterDescriptors

List of register descriptors in dictionary.

Definition at line 46 of file Rose/BinaryAnalysis/BasicTypes.h.

◆ RegisterDictionaryPtr

Reference counting pointer.

Definition at line 48 of file Rose/BinaryAnalysis/BasicTypes.h.

◆ SerialInputPtr

Reference counting pointer.

Definition at line 52 of file Rose/BinaryAnalysis/BasicTypes.h.

◆ SerialIoPtr

Reference counting pointer.

Definition at line 54 of file Rose/BinaryAnalysis/BasicTypes.h.

◆ SerialOutputPtr

Reference counting pointer.

Definition at line 56 of file Rose/BinaryAnalysis/BasicTypes.h.

◆ SmtSolverPtr

using Rose::BinaryAnalysis::SmtSolverPtr = typedef std::shared_ptr<SmtSolver>

Reference counting pointer.

Definition at line 59 of file Rose/BinaryAnalysis/BasicTypes.h.

◆ SymbolicExpressionPtr

Definition at line 117 of file Rose/BinaryAnalysis/BasicTypes.h.

◆ InstructionMap

Mapping from instruction addresses to instructions.

Definition at line 15 of file InstructionMap.h.

Enumeration Type Documentation

◆ CilFamily

enum Rose::BinaryAnalysis::CilFamily

Definition at line 14 of file InstructionEnumsCil.h.

◆ CilInstructionKind

enum Rose::BinaryAnalysis::CilInstructionKind

Definition at line 19 of file InstructionEnumsCil.h.

◆ JvmInstructionKind

enum class Rose::BinaryAnalysis::JvmInstructionKind
strong

Definition at line 28 of file InstructionEnumsJvm.h.

◆ M68kFamily

enum Rose::BinaryAnalysis::M68kFamily

Definition at line 18 of file InstructionEnumsM68k.h.

◆ M68kRegisterClass

enum Rose::BinaryAnalysis::M68kRegisterClass

Definition at line 56 of file InstructionEnumsM68k.h.

◆ M68kSpecialPurposeRegister

enum Rose::BinaryAnalysis::M68kSpecialPurposeRegister

Definition at line 66 of file InstructionEnumsM68k.h.

◆ M68kMacRegister

enum Rose::BinaryAnalysis::M68kMacRegister

Definition at line 75 of file InstructionEnumsM68k.h.

◆ M68kEmacRegister

enum Rose::BinaryAnalysis::M68kEmacRegister

Definition at line 91 of file InstructionEnumsM68k.h.

◆ M68kSupervisorRegister

enum Rose::BinaryAnalysis::M68kSupervisorRegister

Definition at line 101 of file InstructionEnumsM68k.h.

◆ M68kEffectiveAddressMode

enum Rose::BinaryAnalysis::M68kEffectiveAddressMode

Definition at line 187 of file InstructionEnumsM68k.h.

◆ M68kDataFormat

enum Rose::BinaryAnalysis::M68kDataFormat

Definition at line 241 of file InstructionEnumsM68k.h.

◆ M68kInstructionKind

enum Rose::BinaryAnalysis::M68kInstructionKind

Definition at line 253 of file InstructionEnumsM68k.h.

◆ MipsRegisterClass

enum Rose::BinaryAnalysis::MipsRegisterClass

Definition at line 11 of file InstructionEnumsMips.h.

◆ MipsFcsrMinors

enum Rose::BinaryAnalysis::MipsFcsrMinors

Definition at line 24 of file InstructionEnumsMips.h.

◆ MipsSpecialPurposeRegister

enum Rose::BinaryAnalysis::MipsSpecialPurposeRegister

Definition at line 32 of file InstructionEnumsMips.h.

◆ MipsInterruptMajor

enum Rose::BinaryAnalysis::MipsInterruptMajor

Definition at line 41 of file InstructionEnumsMips.h.

◆ MipsInterruptMinor

enum Rose::BinaryAnalysis::MipsInterruptMinor

Definition at line 46 of file InstructionEnumsMips.h.

◆ MipsDataFormat

enum Rose::BinaryAnalysis::MipsDataFormat

Definition at line 53 of file InstructionEnumsMips.h.

◆ MipsInstructionKind

enum Rose::BinaryAnalysis::MipsInstructionKind

Definition at line 62 of file InstructionEnumsMips.h.

◆ PowerpcCapability

Subsets for the PowerPC instruction set.

Enumerator
powerpc_capability_uisa 

User instruction set architecture (UISA).

powerpc_capability_vea 

Virtual environment architecture (VEA).

powerpc_capability_oea 

Operating environment architecture (OEA).

powerpc_capability_440fpu 

PowerPC 440 floating-point unit.

The PowerPC 440 floating-point unit (FPU) with complex arithmetic extensions is an embedded application-specific integrated
circuit (ASIC) core designed to be used with the IBM PowerPC 440 processor core on the Blue Gene/L compute chip. The FPU
core implements the floating-point instruction set from the PowerPC Architecture and the floating-point instruction
extensions created to aid in matrix and complex-arithmetic operations. The FPU instruction extensions define
double-precision operations that are primarily single-instruction multiple-data (SIMD) and require two (primary and
secondary) arithmetic pipelines and floating-point register files. Howerver, to aid complex-arithmetic routines, some FPU
extensions actually perform different (yet closely related) operations while executing in the arithmetic pipelines. The FPU
core implements an operand crossbar between the primary and secondary arithmetic datapaths to enable each pipeline operand
access from the primary or secondary register file. The PowerPC 440 processor core provides 128-bit storage buses and
simultaneous issue of an arithmetic instruction with a storage instruction, allowing the FPU core to fully utilize the
parallel arithmetic pipes.

See "IBM PowerPC 440 FPU with complex-arithmetic extensions" IBM J. RES. & DEV. Vol 49 no 2/3; March/May 2005. 
powerpc_capability_uncategorized 

Uncategorized or unknown.

This is a subset of instructions that have not yet been assigned to any specific category. More research is needed. 
powerpc_capability_default 

Default decoding capabilities.

powerpc_capability_all 

All decoding capabilities.

Definition at line 12 of file InstructionEnumsPowerpc.h.

◆ PowerpcWordSize

enum Rose::BinaryAnalysis::PowerpcWordSize

Definition at line 52 of file InstructionEnumsPowerpc.h.

◆ PowerpcInstructionKind

enum Rose::BinaryAnalysis::PowerpcInstructionKind

Definition at line 58 of file InstructionEnumsPowerpc.h.

◆ PowerpcRegisterClass

enum Rose::BinaryAnalysis::PowerpcRegisterClass

Definition at line 506 of file InstructionEnumsPowerpc.h.

◆ PowerpcConditionRegisterAccessGranularity

enum Rose::BinaryAnalysis::PowerpcConditionRegisterAccessGranularity

Definition at line 522 of file InstructionEnumsPowerpc.h.

◆ PowerpcSpecialPurposeRegister

enum Rose::BinaryAnalysis::PowerpcSpecialPurposeRegister

Definition at line 529 of file InstructionEnumsPowerpc.h.

◆ PowerpcTimeBaseRegister

enum Rose::BinaryAnalysis::PowerpcTimeBaseRegister

Definition at line 540 of file InstructionEnumsPowerpc.h.

◆ X86InstructionSize

enum Rose::BinaryAnalysis::X86InstructionSize

Definition at line 13 of file InstructionEnumsX86.h.

◆ X86RegisterClass

enum Rose::BinaryAnalysis::X86RegisterClass

Definition at line 21 of file InstructionEnumsX86.h.

◆ X86SegmentRegister

enum Rose::BinaryAnalysis::X86SegmentRegister

Definition at line 34 of file InstructionEnumsX86.h.

◆ X86GeneralPurposeRegister

enum Rose::BinaryAnalysis::X86GeneralPurposeRegister

Definition at line 45 of file InstructionEnumsX86.h.

◆ X86StRegister

enum Rose::BinaryAnalysis::X86StRegister

Definition at line 65 of file InstructionEnumsX86.h.

◆ X86Flags

enum Rose::BinaryAnalysis::X86Flags

Definition at line 78 of file InstructionEnumsX86.h.

◆ X86Flag

enum Rose::BinaryAnalysis::X86Flag

Definition at line 87 of file InstructionEnumsX86.h.

◆ X86BranchPrediction

enum Rose::BinaryAnalysis::X86BranchPrediction

Definition at line 108 of file InstructionEnumsX86.h.

◆ X86RepeatPrefix

enum Rose::BinaryAnalysis::X86RepeatPrefix

Definition at line 116 of file InstructionEnumsX86.h.

◆ X86Exception

enum Rose::BinaryAnalysis::X86Exception

Definition at line 125 of file InstructionEnumsX86.h.

◆ X86InstructionKind

List of all x86 instructions known to the ROSE disassembler/assembler.

There is one member of this enumeration for each instruction mnemonic. The AssemblerX86::to_str(X86InstructionKind) static method can be used convert the enumeration constant to a string for printing. Documentation for each instruction can be found on the specified page of the "Instruction Set Reference" available from the Intel web site, version March 2009.

Definition at line 27 of file AssemblerX86Init.h.

Function Documentation

◆ get_ast_node() [1/2]

template<class V , class E >
Sawyer::Container::Graph< V, E >::VertexValue Rose::BinaryAnalysis::get_ast_node ( const Sawyer::Container::Graph< V, E > &  cfg,
size_t  vertexId 
)

◆ put_ast_node() [1/2]

template<class V , class E , class AstNode >
void Rose::BinaryAnalysis::put_ast_node ( Sawyer::Container::Graph< V, E > &  cfg,
size_t  vertexId,
AstNode *  astNode 
)

◆ get_ast_node() [2/2]

template<class A , class B , class C , class D , class E , class F , class G >
boost::property_traits< typenameboost::property_map< boost::adjacency_list< A, B, C, D, E, F, G >, boost::vertex_name_t >::type >::value_type Rose::BinaryAnalysis::get_ast_node ( const boost::adjacency_list< A, B, C, D, E, F, G > &  cfg,
typename boost::graph_traits< boost::adjacency_list< A, B, C, D, E, F, G > >::vertex_descriptor  vertex 
)

Definition at line 578 of file ControlFlow.h.

◆ put_ast_node() [2/2]

template<class A , class B , class C , class D , class E , class F , class G >
void Rose::BinaryAnalysis::put_ast_node ( boost::adjacency_list< A, B, C, D, E, F, G > &  cfg,
typename boost::graph_traits< boost::adjacency_list< A, B, C, D, E, F, G > >::vertex_descriptor  vertex,
typename boost::property_traits< typename boost::property_map< boost::adjacency_list< A, B, C, D, E, F, G >, boost::vertex_name_t >::type >::value_type  ast_node 
)

Definition at line 586 of file ControlFlow.h.

◆ hexdump() [1/9]

void Rose::BinaryAnalysis::hexdump ( std::ostream &  ,
rose_addr_t  base_addr,
const unsigned char *  data,
size_t  data_sz,
const HexdumpFormat  
)

Display binary data.

This function displays binary data in a fashion similar to the "hexdump -C" command in Unix: an address, numeric byte values, character byte values. The format of the output is configurable through the HexdumpFormat argument. There are other versions that output containers of data. The hexdump comes in three flavors: output to a C++ stream, output to a C FILE, and output to an std::string. The FILE and string versions are implemented in terms of the stream version.

◆ hexdump() [2/9]

void Rose::BinaryAnalysis::hexdump ( std::ostream &  ,
rose_addr_t  base_addr,
const std::string &  prefix,
const SgUnsignedCharList &  data,
bool  multiline = true 
)

Display binary data.

This function displays binary data in a fashion similar to the "hexdump -C" command in Unix: an address, numeric byte values, character byte values. The format of the output is configurable through the HexdumpFormat argument. There are other versions that output containers of data. The hexdump comes in three flavors: output to a C++ stream, output to a C FILE, and output to an std::string. The FILE and string versions are implemented in terms of the stream version.

◆ hexdump() [3/9]

void Rose::BinaryAnalysis::hexdump ( std::ostream &  ,
rose_addr_t  base_addr,
const std::string &  prefix,
const SgFileContentList data,
bool  multiline = true 
)

Display binary data.

This function displays binary data in a fashion similar to the "hexdump -C" command in Unix: an address, numeric byte values, character byte values. The format of the output is configurable through the HexdumpFormat argument. There are other versions that output containers of data. The hexdump comes in three flavors: output to a C++ stream, output to a C FILE, and output to an std::string. The FILE and string versions are implemented in terms of the stream version.

◆ hexdump() [4/9]

std::string Rose::BinaryAnalysis::hexdump ( rose_addr_t  base_addr,
const unsigned char *  data,
size_t  data_sz,
const HexdumpFormat  
)

Display binary data.

This function displays binary data in a fashion similar to the "hexdump -C" command in Unix: an address, numeric byte values, character byte values. The format of the output is configurable through the HexdumpFormat argument. There are other versions that output containers of data. The hexdump comes in three flavors: output to a C++ stream, output to a C FILE, and output to an std::string. The FILE and string versions are implemented in terms of the stream version.

◆ hexdump() [5/9]

std::string Rose::BinaryAnalysis::hexdump ( rose_addr_t  base_addr,
const std::string &  prefix,
const SgUnsignedCharList &  data,
bool  multiline = true 
)

Display binary data.

This function displays binary data in a fashion similar to the "hexdump -C" command in Unix: an address, numeric byte values, character byte values. The format of the output is configurable through the HexdumpFormat argument. There are other versions that output containers of data. The hexdump comes in three flavors: output to a C++ stream, output to a C FILE, and output to an std::string. The FILE and string versions are implemented in terms of the stream version.

◆ hexdump() [6/9]

std::string Rose::BinaryAnalysis::hexdump ( rose_addr_t  base_addr,
const std::string &  prefix,
const SgFileContentList data,
bool  multiline = true 
)

Display binary data.

This function displays binary data in a fashion similar to the "hexdump -C" command in Unix: an address, numeric byte values, character byte values. The format of the output is configurable through the HexdumpFormat argument. There are other versions that output containers of data. The hexdump comes in three flavors: output to a C++ stream, output to a C FILE, and output to an std::string. The FILE and string versions are implemented in terms of the stream version.

◆ hexdump() [7/9]

void Rose::BinaryAnalysis::hexdump ( FILE *  ,
rose_addr_t  base_addr,
const unsigned char *  data,
size_t  data_sz,
const HexdumpFormat  
)

Display binary data.

This function displays binary data in a fashion similar to the "hexdump -C" command in Unix: an address, numeric byte values, character byte values. The format of the output is configurable through the HexdumpFormat argument. There are other versions that output containers of data. The hexdump comes in three flavors: output to a C++ stream, output to a C FILE, and output to an std::string. The FILE and string versions are implemented in terms of the stream version.

◆ hexdump() [8/9]

void Rose::BinaryAnalysis::hexdump ( FILE *  ,
rose_addr_t  base_addr,
const std::string &  prefix,
const SgUnsignedCharList &  data,
bool  multiline = true 
)

Display binary data.

This function displays binary data in a fashion similar to the "hexdump -C" command in Unix: an address, numeric byte values, character byte values. The format of the output is configurable through the HexdumpFormat argument. There are other versions that output containers of data. The hexdump comes in three flavors: output to a C++ stream, output to a C FILE, and output to an std::string. The FILE and string versions are implemented in terms of the stream version.

◆ hexdump() [9/9]

void Rose::BinaryAnalysis::hexdump ( FILE *  ,
rose_addr_t  base_addr,
const std::string &  prefix,
const SgFileContentList data,
bool  multiline = true 
)

Display binary data.

This function displays binary data in a fashion similar to the "hexdump -C" command in Unix: an address, numeric byte values, character byte values. The format of the output is configurable through the HexdumpFormat argument. There are other versions that output containers of data. The hexdump comes in three flavors: output to a C++ stream, output to a C FILE, and output to an std::string. The FILE and string versions are implemented in terms of the stream version.

◆ alignUp()

template<typename T , typename U >
boost::enable_if_c< boost::is_integral< T >::value &&boost::is_integral< U >::value, T >::type Rose::BinaryAnalysis::alignUp ( address,
alignment 
)

Align address downward to boundary.

Returns the smallest multiple of alignment which is greater than or equal to address. The alignment is cast to the same type as the address before any calculations are performed. Both arguments must be integral types. An alignment less than one has undefined behavior.

Definition at line 40 of file MemoryMap.h.

◆ alignDown()

template<typename T , typename U >
boost::enable_if_c< boost::is_integral< T >::value &&boost::is_integral< U >::value, T >::type Rose::BinaryAnalysis::alignDown ( address,
alignment 
)

Align address upward to boundary.

Returns the largest multiple of alignment which is less than or equal to address. The alignment is cast to the same type as the address before any calculations are performed. Both arguments must be integral types. An alignment less than one has undefined behavior. Returns zero if no such value can be returned due to overflow.

Definition at line 53 of file MemoryMap.h.

◆ listSmtSolverNames()

bool Rose::BinaryAnalysis::listSmtSolverNames ( std::ostream &  )

List known SMT solvers and their availability.

The names are listed alphabeticallly to the specified output stream. Returns true if any solvers are available, false if no solvers are available.

◆ validateSmtSolverName()

std::string Rose::BinaryAnalysis::validateSmtSolverName ( const std::string &  name)

Validate SMT solver name.

Returns an empty string if the name is valid, an error message otherwise.

◆ bestSmtSolverName()

std::string Rose::BinaryAnalysis::bestSmtSolverName ( )

SMT solver corresponding to "best".

Returns the name of the SMT solver that corresponds to the "best" solver. Returns an empty string if no solvers are available.

◆ checkSmtCommandLineArg()

void Rose::BinaryAnalysis::checkSmtCommandLineArg ( const std::string &  arg,
const std::string &  listSwitch,
std::ostream &  errorStream = std::cerr 
)

Process SMT solver name from command-line.

Checks that the specified SMT solver name is valid, empty, "best", or "none". Returns if the check is successful, or prints an error message and exits if the check is unsuccessful. If an error occurs, and listSwitch is non-empty then a second error message is shown that says "use xxxx to get a list of supported solvers".