Description
Architecture-specific information for Intel i486.
The Intel 486, officially named i486 and also known as 80486, is a microprocessor. It is a higher-performance follow-up to the Intel 386. The i486 was introduced in 1989. It represents the fourth generation of binary compatible CPUs following the 8086 of 1978, the Intel 80286 of 1982, and 1985's i386.
It was the first tightly-pipelined x86 design as well as the first x86 chip to include more than one million transistors. It offered a large on-chip cache and an integrated floating-point unit.
When it was announced, the initial performance was originally published between 15 and 20 VAX MIPS, between 37,000 and 49,000 dhrystones per second, and between 6.1 and 8.2 double-precision megawhetstones per second for both 25 and 33 MHz version. A typical 50 MHz i486 executes around 40 million instructions per second (MIPS), reaching 50 MIPS peak performance. It is approximately twice as fast as the i386 or i286 per clock cycle. The i486's improved performance is thanks to its five-stage pipeline with all stages bound to a single cycle. The enhanced FPU unit on the chip was significantly faster than the i387 FPU per cycle. The intel 80387 FPU ("i387") was a separate, optional math coprocessor that was installed in a motherboard socket alongside the i386.
The i486 was succeeded by the original Pentium.
Definition at line 29 of file IntelI486.h.
#include <Rose/BinaryAnalysis/Architecture/IntelI486.h>
Public Types | |
| using | Ptr = IntelI486Ptr |
 Public Types inherited from Rose::BinaryAnalysis::Architecture::X86 | |
| using | Ptr = X86Ptr |
| Public Types inherited from Rose::BinaryAnalysis::Architecture::Base | |
| using | Ptr = BasePtr |
| Reference counting pointer. | |
| using | ConstPtr = BaseConstPtr |
| Reference counting pointer to const object. | |
Public Member Functions | |
| RegisterDictionary::Ptr | registerDictionary () const override |
| Property: Register dictionary. | |
| bool | matchesHeader (SgAsmGenericHeader *) const override |
| Tests whether this architecture matches a file header. | |
| Public Member Functions inherited from Rose::BinaryAnalysis::Architecture::X86 | |
| virtual const CallingConvention::Dictionary & | callingConventions () const override |
| Property: Calling convention definitions. | |
| Sawyer::Container::Interval< size_t > | bytesPerInstruction () const override |
| Valid sizes for encoded machine instructions. | |
| Alignment | instructionAlignment () const override |
| Alignment for encoded machine instructions. | |
| std::string | instructionMnemonic (const SgAsmInstruction *) const override |
| Mnemonic for an instruction. | |
| bool | terminatesBasicBlock (SgAsmInstruction *) const override |
| Determines whether the specified instruction normally terminates a basic block. | |
| bool | isUnknown (const SgAsmInstruction *) const override |
| Returns true if the instruction is the special "unknown" instruction. | |
| bool | isFunctionCallFast (const std::vector< SgAsmInstruction * > &, rose_addr_t *target, rose_addr_t *ret) const override |
| Returns true if the specified basic block looks like a function call. | |
| bool | isFunctionCallSlow (const std::vector< SgAsmInstruction * > &, rose_addr_t *target, rose_addr_t *ret) const override |
| Returns true if the specified basic block looks like a function call. | |
| bool | isFunctionReturnFast (const std::vector< SgAsmInstruction * > &) const override |
| Returns true if the specified basic block looks like a function return. | |
| Sawyer::Optional< rose_addr_t > | branchTarget (SgAsmInstruction *) const override |
| Obtains the virtual address for a branching instruction. | |
| AddressSet | getSuccessors (SgAsmInstruction *, bool &complete) const override |
| Control flow successors for a single instruction. | |
| AddressSet | getSuccessors (const std::vector< SgAsmInstruction * > &basicBlock, bool &complete, const MemoryMapPtr &initial_memory=MemoryMapPtr()) const override |
| Control flow successors for a basic block. | |
| Disassembler::BasePtr | newInstructionDecoder () const override |
| Construct and return a new instruction decoder. | |
| Unparser::BasePtr | newUnparser () const override |
| Construct and return a new instruction unparser. | |
| virtual InstructionSemantics::BaseSemantics::DispatcherPtr | newInstructionDispatcher (const InstructionSemantics::BaseSemantics::RiscOperatorsPtr &) const override |
| Construct and return a new instruction dispatcher. | |
| virtual std::vector< Partitioner2::FunctionPrologueMatcherPtr > | functionPrologueMatchers (const Partitioner2::EnginePtr &) const override |
| Instruction patterns matching function prologues. | |
| virtual std::vector< Partitioner2::BasicBlockCallbackPtr > | basicBlockCreationHooks (const Partitioner2::EnginePtr &) const override |
| Architecture-specific basic block callbacks for partitioning. | |
| Public Member Functions inherited from Rose::BinaryAnalysis::Architecture::Base | |
| const std::string & | name () const |
| Property: Architecture definition name. | |
| ByteOrder::Endianness | byteOrder () const |
| Property: Byte order for memory. | |
| virtual RegisterDictionaryPtr | interruptDictionary () const |
| Property: Interrupt dictionary. | |
| virtual bool | matchesName (const std::string &) const |
| Tests whether this architecture matches a name. | |
| bool | instructionsCanOverlap () const |
| Whether instructions can overlap in memory. | |
| virtual std::string | toString (const SgAsmExpression *) const |
| Unparse an expression to a string. | |
| virtual std::string | instructionDescription (const SgAsmInstruction *) const |
| Description for an instruction. | |
| virtual bool | isControlTransfer (const SgAsmInstruction *) const |
| Returns true if the specified instruction is a control transfer instruction. | |
| const Sawyer::Optional< size_t > & | registrationId () const |
| Property: Registration identification number. | |
| void | registrationId (const Sawyer::Optional< size_t > &) |
| Property: Registration identification number. | |
| size_t | bytesPerWord () const |
| Property: Word size. | |
| size_t | bitsPerWord () const |
| Property: Word size. | |
| virtual Unparser::BasePtr | newInstructionUnparser () const |
| Construct and return a new instruction unparser. | |
| virtual std::string | toString (const SgAsmInstruction *) const |
| Unparse an instruction to a string. | |
| virtual std::string | toStringNoAddr (const SgAsmInstruction *) const |
| Unparse an instruction to a string. | |
| virtual bool | isFunctionReturnSlow (const std::vector< SgAsmInstruction * > &) const |
| Returns true if the specified basic block looks like a function return. | |
| AddressSet | getSuccessors (const std::vector< SgAsmInstruction * > &basicBlock, bool &complete) const |
| Control flow successors for a basic block. | |
Static Public Member Functions | |
| static Ptr | instance () |
| Allocating constructor. | |
Member Typedef Documentation
◆ Ptr
| using Rose::BinaryAnalysis::Architecture::IntelI486::Ptr = IntelI486Ptr |
Definition at line 31 of file IntelI486.h.
Member Function Documentation
◆ registerDictionary()
|
overridevirtual |
Property: Register dictionary.
The register dictionary defines a mapping between register names and register descriptors (RegisterDescriptor), and thus how the registers map into hardware.
Since dictionaries are generally not modified, it is permissible for this function to return the same dictionary every time it's called. The dictionary can be constructed on the first call.
Thread safety: Thread safe.
Implements Rose::BinaryAnalysis::Architecture::Base.
◆ matchesHeader()
|
overridevirtual |
Tests whether this architecture matches a file header.
Returns true if this architecture matches the specified file header, and false otherwise.
The default implementation always returns false.
Reimplemented from Rose::BinaryAnalysis::Architecture::Base.
The documentation for this class was generated from the following file:
