addressWidth() const | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | |
advanceInstructionPointer(SgAsmInstruction *) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
architecture() const | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | |
autoResetInstructionPointer() const | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | inline |
autoResetInstructionPointer(bool b) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | inline |
autoResetInstructionPointer_ | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | protected |
callReturnRegister() const override | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | virtual |
create(const BaseSemantics::RiscOperatorsPtr &) const override | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | virtual |
currentInstruction() const | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
currentState() const | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
decrementRegisters(SgAsmExpression *) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
Dispatcher() (defined in Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | protected |
Dispatcher(const Architecture::BaseConstPtr &) (defined in Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | explicitprotected |
Dispatcher(const Architecture::BaseConstPtr &, const RiscOperatorsPtr &) (defined in Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | protected |
DispatcherPowerpc(const Architecture::BaseConstPtr &) (defined in Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc) | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | protected |
DispatcherPowerpc(const Architecture::BaseConstPtr &, const BaseSemantics::RiscOperatorsPtr &) (defined in Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc) | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | protected |
effectiveAddress(SgAsmExpression *, size_t nbits=0) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
findRegister(const std::string ®name, size_t nbits=0, bool allowMissing=false) const | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
incrementRegisters(SgAsmExpression *) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
initializeState(const StatePtr &) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
InsnProcessors typedef (defined in Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | protected |
instance(const Architecture::BaseConstPtr &) | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | static |
instance(const Architecture::BaseConstPtr &, const BaseSemantics::RiscOperatorsPtr &) | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | static |
instructionPointerRegister() const override | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | virtual |
iproc_table (defined in Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | protected |
iprocGet(int key) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
iprocKey(SgAsmInstruction *insn_) const override | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | virtual |
iprocLookup(SgAsmInstruction *insn) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
iprocReplace(SgAsmInstruction *insn, InsnProcessor *iproc) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
iprocSet(int key, InsnProcessor *iproc) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
number_(size_t nbits, uint64_t number) const | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
operators() const | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
operators(const RiscOperatorsPtr &) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
postUpdate(SgAsmExpression *, const BaseSemantics::SValuePtr &enabled) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
preUpdate(SgAsmExpression *, const BaseSemantics::SValuePtr &enabled) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
processInstruction(SgAsmInstruction *insn) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
promote(const BaseSemantics::DispatcherPtr &) | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | static |
protoval() const | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
Ptr typedef | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | |
read(SgAsmExpression *, size_t value_nbits=0, size_t addr_nbits=0) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
readAndUpdate(BaseSemantics::RiscOperators *, SgAsmExpression *, size_t valueNBits) | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | |
REG_CR | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | |
REG_CR0 | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | |
REG_CR0_LT | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | |
REG_CTR | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | |
REG_IAR | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | |
REG_LR | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | |
REG_XER | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | |
REG_XER_CA | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | |
REG_XER_OV | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | |
REG_XER_SO | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | |
registerDictionary() const | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | |
segmentRegister(SgAsmMemoryReferenceExpression *) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
setXerOverflow(const BaseSemantics::SValuePtr &hadOverflow) | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | |
stackFrameRegister() const override | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | virtual |
stackPointerRegister() const override | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | virtual |
Super typedef | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | |
undefined_(size_t nbits) const | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
unspecified_(size_t nbits) const | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
updateCr0(const BaseSemantics::SValuePtr &result) | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | virtual |
write(SgAsmExpression *, const SValuePtr &value, size_t addr_nbits=0) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
writeAndUpdate(BaseSemantics::RiscOperators *, SgAsmExpression *destination, const BaseSemantics::SValuePtr &value) | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | |
~Dispatcher() (defined in Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher) | Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | virtual |
~DispatcherPowerpc() (defined in Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc) | Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc | |