Description

Basic semantic operations.

These are the implementations of the RISC operators inherited from the base class, plus some additional functionality specific to this domain.

The semantic state is split between the BaseSemantics::State object normally attached to semantic domains, and the side effect list stored in this RiscOperators object. Neither is complete by itself.

Definition at line 184 of file SourceAstSemantics.h.

#include <Rose/BinaryAnalysis/InstructionSemantics/SourceAstSemantics.h>

Inheritance diagram for Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators:

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Collaboration diagram for Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators:

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Classes
struct	SideEffect
	Side effect. More...

Public Types
using	Super = BaseSemantics::RiscOperators
	Base type.

using	Ptr = RiscOperatorsPtr
	Shared-ownership pointer.

typedef std::vector< SideEffect >	SideEffects
	Side effects in the order they occur.

Public Types inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators
enum class	IteStatus { NEITHER , A , B , BOTH }
	Status for iteWithStatus operation. More...

using	Ptr = RiscOperatorsPtr
	Shared-ownership pointer.

Public Member Functions
virtual BaseSemantics::RiscOperatorsPtr	create (const BaseSemantics::SValuePtr &protoval, const SmtSolverPtr &solver=SmtSolverPtr()) const override
	Virtual allocating constructor.

virtual BaseSemantics::RiscOperatorsPtr	create (const BaseSemantics::StatePtr &, const SmtSolverPtr &solver=SmtSolverPtr()) const override
	Virtual allocating constructor.

BaseSemantics::SValuePtr	makeSValue (size_t nbits, SgNode *, const std::string &ctext="")
	Create a new SValue.

BaseSemantics::SValuePtr	saveSideEffect (const BaseSemantics::SValuePtr &expression, const BaseSemantics::SValuePtr &location=BaseSemantics::SValuePtr())
	Save a side effect.

BaseSemantics::SValuePtr	substitute (const BaseSemantics::SValuePtr &expression)
	Save input value.

const SideEffects &	sideEffects () const
	Accumulated side effects and substitutions.

void	resetState ()
	Reset state to initial conditions.

std::string	registerVariableName (RegisterDescriptor)
	Global variable name for a register.

void	reset ()
	Reset to initial state.

void	haltExecution ()
	Halt execution.

BaseSemantics::SValuePtr	makeMask (size_t nBits, size_t nSet, size_t sa=0)
	Return a bit mask.

virtual BaseSemantics::SValuePtr	unspecified_ (size_t nbits) override
	Returns a new undefined value.

virtual void	hlt () override
	Invoked for the x86 HLT instruction.

virtual void	cpuid () override
	Invoked for the x86 CPUID instruction.

virtual BaseSemantics::SValuePtr	rdtsc () override
	Invoked for the x86 RDTSC instruction.

virtual BaseSemantics::SValuePtr	and_ (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override
	Computes bit-wise AND of two values.

virtual BaseSemantics::SValuePtr	or_ (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override
	Computes bit-wise OR of two values.

virtual BaseSemantics::SValuePtr	xor_ (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override
	Computes bit-wise XOR of two values.

virtual BaseSemantics::SValuePtr	invert (const BaseSemantics::SValuePtr &a_) override
	One's complement.

virtual BaseSemantics::SValuePtr	extract (const BaseSemantics::SValuePtr &a_, size_t begin_bit, size_t end_bit) override
	Extracts bits from a value.

virtual BaseSemantics::SValuePtr	concat (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override
	Concatenates the bits of two values.

virtual BaseSemantics::SValuePtr	leastSignificantSetBit (const BaseSemantics::SValuePtr &a_) override
	Returns position of least significant set bit; zero when no bits are set.

virtual BaseSemantics::SValuePtr	mostSignificantSetBit (const BaseSemantics::SValuePtr &a_) override
	Returns position of most significant set bit; zero when no bits are set.

virtual BaseSemantics::SValuePtr	rotateLeft (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &sa_) override
	Rotate bits to the left.

virtual BaseSemantics::SValuePtr	rotateRight (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &sa_) override
	Rotate bits to the right.

virtual BaseSemantics::SValuePtr	shiftLeft (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &sa_) override
	Returns arg shifted left.

virtual BaseSemantics::SValuePtr	shiftRight (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &sa_) override
	Returns arg shifted right logically (no sign bit).

virtual BaseSemantics::SValuePtr	shiftRightArithmetic (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &sa_) override
	Returns arg shifted right arithmetically (with sign bit).

virtual BaseSemantics::SValuePtr	equalToZero (const BaseSemantics::SValuePtr &a_) override
	Determines whether a value is equal to zero.

virtual BaseSemantics::SValuePtr	iteWithStatus (const BaseSemantics::SValuePtr &sel_, const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_, IteStatus &) override
	If-then-else with status.

virtual BaseSemantics::SValuePtr	unsignedExtend (const BaseSemantics::SValuePtr &a_, size_t new_width) override
	Extend (or shrink) operand `a` so it is `nbits` wide by adding or removing high-order bits.

virtual BaseSemantics::SValuePtr	signExtend (const BaseSemantics::SValuePtr &a_, size_t new_width) override
	Sign extends a value.

virtual BaseSemantics::SValuePtr	add (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override
	Adds two integers of equal size.

virtual BaseSemantics::SValuePtr	addWithCarries (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_, const BaseSemantics::SValuePtr &c_, BaseSemantics::SValuePtr &carry_out) override
	Add two values of equal size and a carry bit.

virtual BaseSemantics::SValuePtr	negate (const BaseSemantics::SValuePtr &a_) override
	Two's complement.

virtual BaseSemantics::SValuePtr	signedDivide (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override
	Divides two signed values.

virtual BaseSemantics::SValuePtr	signedModulo (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override
	Calculates modulo with signed values.

virtual BaseSemantics::SValuePtr	signedMultiply (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override
	Multiplies two signed values.

virtual BaseSemantics::SValuePtr	unsignedDivide (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override
	Divides two unsigned values.

virtual BaseSemantics::SValuePtr	unsignedModulo (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override
	Calculates modulo with unsigned values.

virtual BaseSemantics::SValuePtr	unsignedMultiply (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override
	Multiply two unsigned values.

virtual void	interrupt (int majr, int minr) override
	Unconditionally raise an interrupt.

virtual BaseSemantics::SValuePtr	readRegister (RegisterDescriptor reg, const BaseSemantics::SValuePtr &dflt) override
	Reads a value from a register.

virtual BaseSemantics::SValuePtr	peekRegister (RegisterDescriptor reg, const BaseSemantics::SValuePtr &dflt) override
	Obtain a register value without side effects.

virtual void	writeRegister (RegisterDescriptor reg, const BaseSemantics::SValuePtr &a) override
	Writes a value to a register.

virtual BaseSemantics::SValuePtr	readMemory (RegisterDescriptor segreg, const BaseSemantics::SValuePtr &addr, const BaseSemantics::SValuePtr &dflt, const BaseSemantics::SValuePtr &cond) override
	Reads a value from memory.

virtual BaseSemantics::SValuePtr	peekMemory (RegisterDescriptor segreg, const BaseSemantics::SValuePtr &addr, const BaseSemantics::SValuePtr &dflt) override
	Read memory without side effects.

virtual void	writeMemory (RegisterDescriptor segreg, const BaseSemantics::SValuePtr &addr, const BaseSemantics::SValuePtr &data, const BaseSemantics::SValuePtr &cond) override
	Writes a value to memory.

Public Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators
virtual SValuePtr	protoval () const
	Property: Prototypical semantic value.

virtual void	hash (Combinatorics::Hasher &)
	Compute hash of current state.

virtual void	startInstruction (SgAsmInstruction *insn)
	Called at the beginning of every instruction.

virtual void	finishInstruction (SgAsmInstruction *insn)
	Called at the end of every instruction.

virtual void	comment (const std::string &)
	Inject a line comment into debugging streams.

virtual SValuePtr	number_ (size_t nbits, uint64_t value)
	Returns a number of the specified bit width.

virtual SValuePtr	boolean_ (bool value)
	Returns a Boolean value.

virtual SValuePtr	bottom_ (size_t nbits)
	Returns a data-flow bottom value.

virtual SValuePtr	filterCallTarget (const SValuePtr &a)
	Invoked to filter call targets.

virtual SValuePtr	filterReturnTarget (const SValuePtr &a)
	Invoked to filter return targets.

virtual SValuePtr	filterIndirectJumpTarget (const SValuePtr &a)
	Invoked to filter indirect jumps.

virtual std::pair< SValuePtr, SValuePtr >	split (const SValuePtr &a, size_t splitPoint)
	Split a value into two narrower values.

virtual SValuePtr	countLeadingZeros (const SValuePtr &a)
	Count leading zero bits.

virtual SValuePtr	countLeadingOnes (const SValuePtr &a)
	Count leading one bits.

virtual SValuePtr	reverseElmts (const SValuePtr &a, size_t elmtNBits)
	Reverse parts of a value.

virtual SValuePtr	ite (const SValuePtr &cond, const SValuePtr &a, const SValuePtr &b) final
	If-then-else.

virtual SValuePtr	addCarry (const SValuePtr &a, const SValuePtr &b, SValuePtr &carryOut, SValuePtr &overflowed)
	Adds two integers of equal size and carry.

virtual SValuePtr	subtract (const SValuePtr &minuend, const SValuePtr &subtrahend)
	Subtract one value from another.

virtual SValuePtr	subtractCarry (const SValuePtr &minuend, const SValuePtr &subtrahend, SValuePtr &carryOut, SValuePtr &overflowed)
	Subtract one value from another and carry.

virtual void	interrupt (const SValuePtr &majr, const SValuePtr &minr, const SValuePtr &raise)
	Invoked for instructions that cause an interrupt.

virtual void	raiseInterrupt (unsigned majorNumber, unsigned minorNumber, const SValuePtr &raise)
	Conditionally raise an interrupt.

virtual SValuePtr	fpFromInteger (const SValuePtr &intValue, SgAsmFloatType *fpType)
	Construct a floating-point value from an integer value.

virtual SValuePtr	fpToInteger (const SValuePtr &fpValue, SgAsmFloatType *fpType, const SValuePtr &dflt)
	Construct an integer value from a floating-point value.

virtual SValuePtr	fpConvert (const SValuePtr &a, SgAsmFloatType aType, SgAsmFloatType retType)
	Convert from one floating-point type to another.

virtual SValuePtr	fpIsNan (const SValuePtr &fpValue, SgAsmFloatType *fpType)
	Whether a floating-point value is a special not-a-number bit pattern.

virtual SValuePtr	fpIsDenormalized (const SValuePtr &fpValue, SgAsmFloatType *fpType)
	Whether a floating-point value is denormalized.

virtual SValuePtr	fpIsZero (const SValuePtr &fpValue, SgAsmFloatType *fpType)
	Whether a floating-point value is equal to zero.

virtual SValuePtr	fpIsInfinity (const SValuePtr &fpValue, SgAsmFloatType *fpType)
	Whether a floating-point value is infinity.

virtual SValuePtr	fpSign (const SValuePtr &fpValue, SgAsmFloatType *fpType)
	Sign of floating-point value.

virtual SValuePtr	fpEffectiveExponent (const SValuePtr &fpValue, SgAsmFloatType *fpType)
	Exponent of floating-point value.

virtual SValuePtr	fpAdd (const SValuePtr &a, const SValuePtr &b, SgAsmFloatType *fpType)
	Add two floating-point values.

virtual SValuePtr	fpSubtract (const SValuePtr &a, const SValuePtr &b, SgAsmFloatType *fpType)
	Subtract one floating-point value from another.

virtual SValuePtr	fpMultiply (const SValuePtr &a, const SValuePtr &b, SgAsmFloatType *fpType)
	Multiply two floating-point values.

virtual SValuePtr	fpDivide (const SValuePtr &a, const SValuePtr &b, SgAsmFloatType *fpType)
	Divide one floating-point value by another.

virtual SValuePtr	fpSquareRoot (const SValuePtr &a, SgAsmFloatType *fpType)
	Square root.

virtual SValuePtr	fpRoundTowardZero (const SValuePtr &a, SgAsmFloatType *fpType)
	Round toward zero.

virtual SValuePtr	reinterpret (const SValuePtr &a, SgAsmType *retType)
	Reinterpret an expression as a different type.

virtual SValuePtr	convert (const SValuePtr &a, SgAsmType srcType, SgAsmType dstType)
	Convert value from one type to another.

virtual SmtSolverPtr	solver () const
	Property: Satisfiability module theory (SMT) solver.

virtual void	solver (const SmtSolverPtr &s)
	Property: Satisfiability module theory (SMT) solver.

const HotPatch &	hotPatch () const
	Property: Post-instruction hot patches.

HotPatch &	hotPatch ()
	Property: Post-instruction hot patches.

void	hotPatch (const HotPatch &hp)
	Property: Post-instruction hot patches.

virtual StatePtr	currentState () const
	Property: Current semantic state.

virtual void	currentState (const StatePtr &s)
	Property: Current semantic state.

virtual StatePtr	initialState () const
	Property: Optional lazily updated initial state.

virtual void	initialState (const StatePtr &s)
	Property: Optional lazily updated initial state.

virtual const std::string &	name () const
	Property: Name used for debugging.

virtual void	name (const std::string &s)
	Property: Name used for debugging.

void	print (std::ostream &stream, const std::string prefix="") const
	Print multi-line output for this object.

virtual void	print (std::ostream &stream, Formatter &fmt) const
	Print multi-line output for this object.

WithFormatter	with_format (Formatter &fmt)
	Used for printing RISC operators with formatting.

WithFormatter	operator+ (Formatter &fmt)
	Used for printing RISC operators with formatting.

WithFormatter	operator+ (const std::string &linePrefix)
	Used for printing RISC operators with formatting.

virtual size_t	nInsns () const
	Property: Number of instructions processed.

virtual void	nInsns (size_t n)
	Property: Number of instructions processed.

virtual SgAsmInstruction *	currentInstruction () const
	Property: Current instruction.

virtual void	currentInstruction (SgAsmInstruction *insn)
	Property: Current instruction.

virtual bool	isNoopRead () const
	Property: No-op read.

virtual void	isNoopRead (bool b)
	Property: No-op read.

virtual SValuePtr	undefined_ (size_t nbits)
	Returns a new undefined value.

virtual SValuePtr	concatLoHi (const SValuePtr &lowBits, const SValuePtr &highBits)
	Aliases for concatenation.

virtual SValuePtr	concatHiLo (const SValuePtr &highBits, const SValuePtr &lowBits)
	Aliases for concatenation.

virtual SValuePtr	isEqual (const SValuePtr &a, const SValuePtr &b)
	Equality comparison.

virtual SValuePtr	isNotEqual (const SValuePtr &a, const SValuePtr &b)
	Equality comparison.

virtual SValuePtr	isUnsignedLessThan (const SValuePtr &a, const SValuePtr &b)
	Comparison for unsigned values.

virtual SValuePtr	isUnsignedLessThanOrEqual (const SValuePtr &a, const SValuePtr &b)
	Comparison for unsigned values.

virtual SValuePtr	isUnsignedGreaterThan (const SValuePtr &a, const SValuePtr &b)
	Comparison for unsigned values.

virtual SValuePtr	isUnsignedGreaterThanOrEqual (const SValuePtr &a, const SValuePtr &b)
	Comparison for unsigned values.

virtual SValuePtr	isSignedLessThan (const SValuePtr &a, const SValuePtr &b)
	Comparison for signed values.

virtual SValuePtr	isSignedLessThanOrEqual (const SValuePtr &a, const SValuePtr &b)
	Comparison for signed values.

virtual SValuePtr	isSignedGreaterThan (const SValuePtr &a, const SValuePtr &b)
	Comparison for signed values.

virtual SValuePtr	isSignedGreaterThanOrEqual (const SValuePtr &a, const SValuePtr &b)
	Comparison for signed values.

virtual SValuePtr	readRegister (RegisterDescriptor reg)
	Reads a value from a register.

SValuePtr	peekRegister (RegisterDescriptor reg)
	Obtain a register value without side effects.

Static Public Member Functions
static RiscOperatorsPtr	instanceFromRegisters (const RegisterDictionaryPtr &, const SmtSolverPtr &solver=SmtSolverPtr())
	Instantiates a new RiscOperators object and configures it to use semantic values and states that are defaults for SourceAstSemantics.

static RiscOperatorsPtr	instanceFromProtoval (const BaseSemantics::SValuePtr &protoval, const SmtSolverPtr &solver=SmtSolverPtr())
	Instantiates a new RiscOperators object with specified prototypical values.

static RiscOperatorsPtr	instanceFromState (const BaseSemantics::StatePtr &, const SmtSolverPtr &)
	Instantiates a new RiscOperators object with specified state.

static RiscOperatorsPtr	promote (const BaseSemantics::RiscOperatorsPtr &)
	Run-time promotion of a base RiscOperators instance to an instance of this semantic domain's operators.

Static Public Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators
static RiscOperatorsPtr	promote (const RiscOperatorsPtr &x)

Protected Member Functions
	RiscOperators (const BaseSemantics::SValuePtr &protoval, const SmtSolverPtr &)

	RiscOperators (const BaseSemantics::StatePtr &, const SmtSolverPtr &)

Protected Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators
	RiscOperators (const SValuePtr &protoval, const SmtSolverPtr &solver=SmtSolverPtr())

	RiscOperators (const StatePtr &state, const SmtSolverPtr &solver=SmtSolverPtr())

Member Typedef Documentation

◆ Super

using Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::Super = BaseSemantics::RiscOperators

Base type.

Definition at line 187 of file SourceAstSemantics.h.

◆ Ptr

using Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::Ptr = RiscOperatorsPtr

Shared-ownership pointer.

Definition at line 190 of file SourceAstSemantics.h.

◆ SideEffects

typedef std::vector<SideEffect> Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::SideEffects

Side effects in the order they occur.

Definition at line 218 of file SourceAstSemantics.h.

Member Function Documentation

◆ instanceFromProtoval()

static RiscOperatorsPtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::instanceFromProtoval	(	const BaseSemantics::SValuePtr &	protoval,
		const SmtSolverPtr &	solver = `SmtSolverPtr()`
	)

static

Instantiates a new RiscOperators object with specified prototypical values.

An SMT solver may be specified as the second argument because the base class expects one, but it is not used for this semantic domain. See solver for details.

◆ instanceFromState()

static RiscOperatorsPtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::instanceFromState	(	const BaseSemantics::StatePtr &	,
		const SmtSolverPtr &
	)

static

Instantiates a new RiscOperators object with specified state.

An SMT solver may be specified as the second argument because the base class expects one, but it is not used for this semantic domain. See solver for details.

◆ create() [1/2]

virtual BaseSemantics::RiscOperatorsPtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::create	(	const BaseSemantics::SValuePtr &	protoval,
		const SmtSolverPtr &	solver = `SmtSolverPtr()`
	)		const

overridevirtual

Virtual allocating constructor.

The protoval is a prototypical semantic value that is used as a factory to create additional values as necessary via its virtual constructors. The state upon which the RISC operations operate must be set by modifying the currentState property. An optional SMT solver may be specified (see solver).

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ create() [2/2]

virtual BaseSemantics::RiscOperatorsPtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::create	(	const BaseSemantics::StatePtr &	state,
		const SmtSolverPtr &	solver = `SmtSolverPtr()`
	)		const

overridevirtual

Virtual allocating constructor.

The supplied state is that upon which the RISC operations operate and is also used to define the prototypical semantic value. Other states can be supplied by setting currentState. The prototypical semantic value is used as a factory to create additional values as necessary via its virtual constructors. An optional SMT solver may be specified (see solver).

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ promote()

static RiscOperatorsPtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::promote ( const BaseSemantics::RiscOperatorsPtr & )

static

Run-time promotion of a base RiscOperators instance to an instance of this semantic domain's operators.

This is a checked conversion–it will fail if x does not point to a SourceAstSemantics::RiscOperators object.

◆ saveSideEffect()

BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::saveSideEffect	(	const BaseSemantics::SValuePtr &	expression,
		const BaseSemantics::SValuePtr &	location = `BaseSemantics::SValuePtr()`
	)

Save a side effect.

A side effect is either a call to a special source function that doesn't return a value, or an assignment to a register or memory location. In the latter case (assignment) a new temporary variable is created and returned. This temporary can be used instead of the original expression if desired.

◆ substitute()

BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::substitute ( const BaseSemantics::SValuePtr & expression )

Save input value.

This substitutes one value for another. These records are stored as side effects: although they don't change the single global state of the C program, they do change a local state. These substitutions generally become the static single assignment (SSA) part of the generated C code.

◆ sideEffects()

const SideEffects & Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::sideEffects ( ) const

Accumulated side effects and substitutions.

Returns the side effects and substitutions in the order they occurred.

◆ registerVariableName()

std::string Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::registerVariableName ( RegisterDescriptor )

Global variable name for a register.

No attempt is made to ensure that the register really has a valid global variable. The rule is that if the register exists as a single location in the register state then it has a global variable.

◆ haltExecution()

void Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::haltExecution ( )

inline

Halt execution.

This causes all subsequent side effects (but not substitutions) to be discarded. For instance, the x86 HLT instruction will call this and the effect is that the translation assumes that no side effects generated after the point that this method is called are ever actually reached. Resetting the state via resetState will also change the execution state from halted to running.

Definition at line 304 of file SourceAstSemantics.h.

◆ makeMask()

BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::makeMask	(	size_t	nBits,
		size_t	nSet,
		size_t	sa = `0`
	)

Return a bit mask.

The resuling mask has a type that is nBits wide, and it has nSet bits set and shifted left sa. The nSet and sa are optimized for cases of 0 and 1 and generate correct C shift operators when they are too large for the result type.

◆ unspecified_()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::unspecified_ ( size_t nbits )

overridevirtual

Returns a new undefined value.

Uses the prototypical value to virtually construct the new value.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ hlt()

virtual void Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::hlt ( )

overridevirtual

Invoked for the x86 HLT instruction.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ cpuid()

virtual void Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::cpuid ( )

overridevirtual

Invoked for the x86 CPUID instruction.

FIXME: x86-specific stuff should be in the dispatcher.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ rdtsc()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::rdtsc ( )

overridevirtual

Invoked for the x86 RDTSC instruction.

FIXME: x86-specific stuff should be in the dispatcher.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ and_()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::and_	(	const BaseSemantics::SValuePtr &	a,
		const BaseSemantics::SValuePtr &	b
	)

overridevirtual

Computes bit-wise AND of two values.

The operands must both have the same width; the result must be the same width as the operands.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ or_()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::or_	(	const BaseSemantics::SValuePtr &	a,
		const BaseSemantics::SValuePtr &	b
	)

overridevirtual

Computes bit-wise OR of two values.

The operands a and b must have the same width; the return value width will be the same as a and b.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ xor_()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::xor_	(	const BaseSemantics::SValuePtr &	a,
		const BaseSemantics::SValuePtr &	b
	)

overridevirtual

Computes bit-wise XOR of two values.

The operands a and b must have the same width; the result will be the same width as a and b.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ invert()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::invert ( const BaseSemantics::SValuePtr & a )

overridevirtual

One's complement.

The result will be the same size as the operand.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ extract()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::extract	(	const BaseSemantics::SValuePtr &	a,
		size_t	begin_bit,
		size_t	end_bit
	)

overridevirtual

Extracts bits from a value.

The specified bits from begin_bit (inclusive) through end_bit (exclusive) are copied into the low-order bits of the return value (other bits in the return value are cleared). The least significant bit is number zero. The begin_bit and end_bit values must be valid for the width of a.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ concat()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::concat	(	const BaseSemantics::SValuePtr &	lowBits,
		const BaseSemantics::SValuePtr &	highBits
	)

overridevirtual

Concatenates the bits of two values.

The bits of lowBits and highBits are concatenated so that the result has lowBits in the low-order bits and highBits in the high order bits. The width of the return value is the sum of the widths of lowBits and highBits.

Note that the order of arguments for this method is the reverse of the SymbolicExpression concatenation function.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ leastSignificantSetBit()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::leastSignificantSetBit ( const BaseSemantics::SValuePtr & a )

overridevirtual

Returns position of least significant set bit; zero when no bits are set.

The return value will have the same width as the operand, although this can be safely truncated to the log-base-2 + 1 width.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ mostSignificantSetBit()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::mostSignificantSetBit ( const BaseSemantics::SValuePtr & a )

overridevirtual

Returns position of most significant set bit; zero when no bits are set.

The return value will have the same width as the operand, although this can be safely truncated to the log-base-2 + 1 width.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ rotateLeft()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::rotateLeft	(	const BaseSemantics::SValuePtr &	a,
		const BaseSemantics::SValuePtr &	nbits
	)

overridevirtual

Rotate bits to the left.

The return value will have the same width as operand a. The nbits is interpreted as unsigned. The behavior is modulo the width of a regardless of whether the implementation makes that a special case or handles it naturally.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ rotateRight()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::rotateRight	(	const BaseSemantics::SValuePtr &	a,
		const BaseSemantics::SValuePtr &	nbits
	)

overridevirtual

Rotate bits to the right.

The return value will have the same width as operand a. The nbits is interpreted as unsigned. The behavior is modulo the width of a regardless of whether the implementation makes that a special case or handles it naturally.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ shiftLeft()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::shiftLeft	(	const BaseSemantics::SValuePtr &	a,
		const BaseSemantics::SValuePtr &	nbits
	)

overridevirtual

Returns arg shifted left.

The return value will have the same width as operand a. The nbits is interpreted as unsigned. New bits shifted into the value are zero. If nbits is equal to or larger than the width of a then the result is zero.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ shiftRight()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::shiftRight	(	const BaseSemantics::SValuePtr &	a,
		const BaseSemantics::SValuePtr &	nbits
	)

overridevirtual

Returns arg shifted right logically (no sign bit).

The return value will have the same width as operand a. The nbits is interpreted as unsigned. New bits shifted into the value are zero. If nbits is equal to or larger than the width of a then the result is zero.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ shiftRightArithmetic()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::shiftRightArithmetic	(	const BaseSemantics::SValuePtr &	a,
		const BaseSemantics::SValuePtr &	nbits
	)

overridevirtual

Returns arg shifted right arithmetically (with sign bit).

The return value will have the same width as operand a. The nbits is interpreted as unsigned. New bits shifted into the value are the same as the most significant bit (the "sign bit"). If nbits is equal to or larger than the width of a then the result has all bits cleared or all bits set depending on whether the most significant bit was originally clear or set.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ equalToZero()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::equalToZero ( const BaseSemantics::SValuePtr & a )

overridevirtual

Determines whether a value is equal to zero.

Returns true, false, or undefined (in the semantic domain) depending on whether argument is zero.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ iteWithStatus()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::iteWithStatus	(	const BaseSemantics::SValuePtr &	cond,
		const BaseSemantics::SValuePtr &	a,
		const BaseSemantics::SValuePtr &	b,
		IteStatus &	status
	)

overridevirtual

If-then-else with status.

Returns operand a if cond is true, operand b if cond is false, or some other value if the condition is unknown. The condition must be one bit wide; the widths of a and b must be equal; the return value width will be the same as a and b.

The status is an output that indicates how the main return value was determined.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ unsignedExtend()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::unsignedExtend	(	const BaseSemantics::SValuePtr &	a,
		size_t	new_width
	)

overridevirtual

Extend (or shrink) operand a so it is nbits wide by adding or removing high-order bits.

Added bits are always zeros. The result will be the specified new_width.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ signExtend()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::signExtend	(	const BaseSemantics::SValuePtr &	a,
		size_t	new_width
	)

overridevirtual

Sign extends a value.

The result will be the specified new_width, which must be at least as large as the original width.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ add()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::add	(	const BaseSemantics::SValuePtr &	a,
		const BaseSemantics::SValuePtr &	b
	)

overridevirtual

Adds two integers of equal size.

The width of a and b must be equal; the return value will have the same width as a and b.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ addWithCarries()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::addWithCarries	(	const BaseSemantics::SValuePtr &	a,
		const BaseSemantics::SValuePtr &	b,
		const BaseSemantics::SValuePtr &	c,
		BaseSemantics::SValuePtr &	carry_out
	)

overridevirtual

Add two values of equal size and a carry bit.

Carry information is returned via carry_out argument. The carry_out value is the tick marks that are written above the first addend when doing long arithmetic like a 2nd grader would do (of course, they'd probably be adding two base-10 numbers). For instance, when adding 00110110 and 11100100:

 '''..'..         <-- carry tick marks: '=carry .=no carry
  00110110
+ 11100100
----------
 100011010

The carry_out value is 11100100.

The width of a and b must be equal; c must have a width of one bit; the return value and carry_out will be the same width as a and b. The carry_out value is allocated herein.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ negate()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::negate ( const BaseSemantics::SValuePtr & a )

overridevirtual

Two's complement.

The return value will have the same width as the operand.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ signedDivide()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::signedDivide	(	const BaseSemantics::SValuePtr &	dividend,
		const BaseSemantics::SValuePtr &	divisor
	)

overridevirtual

Divides two signed values.

The width of the result will be the same as the width of the dividend.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ signedModulo()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::signedModulo	(	const BaseSemantics::SValuePtr &	a,
		const BaseSemantics::SValuePtr &	b
	)

overridevirtual

Calculates modulo with signed values.

The width of the result will be the same as the width of operand b.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ signedMultiply()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::signedMultiply	(	const BaseSemantics::SValuePtr &	a,
		const BaseSemantics::SValuePtr &	b
	)

overridevirtual

Multiplies two signed values.

The width of the result will be the sum of the widths of a and b.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ unsignedDivide()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::unsignedDivide	(	const BaseSemantics::SValuePtr &	dividend,
		const BaseSemantics::SValuePtr &	divisor
	)

overridevirtual

Divides two unsigned values.

The width of the result is the same as the width of the dividend.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ unsignedModulo()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::unsignedModulo	(	const BaseSemantics::SValuePtr &	a,
		const BaseSemantics::SValuePtr &	b
	)

overridevirtual

Calculates modulo with unsigned values.

The width of the result is the same as the width of operand b.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ unsignedMultiply()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::unsignedMultiply	(	const BaseSemantics::SValuePtr &	a,
		const BaseSemantics::SValuePtr &	b
	)

overridevirtual

Multiply two unsigned values.

The width of the result is the sum of the widths of a and b.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ interrupt()

virtual void Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::interrupt	(	int	majorNumber,
		int	minorNumber
	)

overridevirtual

Unconditionally raise an interrupt.

The major and minor numbers are architecture specific. For instance, an x86 INT instruction uses major number zero and the minor number is the interrupt number (e.g., 0x80 for Linux system calls), while an x86 SYSENTER instruction uses major number one.

The base implementation does one of two things. If the current state has an interrupt sub-state then the specified interrupt is raised in that state by setting that interrupt to true. Otherwise, the base implementation does nothing.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ readRegister()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::readRegister	(	RegisterDescriptor	reg,
		const BaseSemantics::SValuePtr &	dflt
	)

overridevirtual

Reads a value from a register.

The base implementation simply delegates to the current semantic State, which probably delegates to a register state, but subclasses are welcome to override this behavior at any level.

A register state will typically implement storage for hardware registers, but higher layers (the State, RiscOperators, Dispatcher, ...) should not be concerned about the size of the register they're trying to read. For example, a register state for a 32-bit x86 architecture will likely have a storage location for the 32-bit EAX register, but it should be possible to ask readRegister to return the value of AX (the low-order 16-bits). In order to accomplish this, some level of the readRegister delegations needs to invoke extract to obtain the low 16 bits. The RiscOperators object is passed along the delegation path for this purpose. The inverse concat operation will be needed at some level when we ask readRegister to return a value that comes from multiple storage locations in the register state (such as can happen if an x86 register state holds individual status flags and we ask for the 32-bit EFLAGS register).

If the register state can distinguish between a register that has never been accessed and a register that has only been read, then the dflt value is stored into the register the first time it's read. This ensures that reading the register a second time with no intervening write will return the same value as the first read. If a dflt is not provided then one is constructed by invoking undefined_.

There needs to be a certain level of cooperation between the RiscOperators, State, and register state classes to decide which layer should invoke the extract or concat (or whatever other RISC operations might be necessary).

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ peekRegister()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::peekRegister	(	RegisterDescriptor	,
		const BaseSemantics::SValuePtr &	dflt
	)

overridevirtual

Obtain a register value without side effects.

This is a lower-level operation than readRegister in that it doesn't cause the register to be marked as having been read. It is typically used in situations where the register is being accessed for analysis purposes rather than as part of an instruction emulation.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ writeRegister()

virtual void Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::writeRegister	(	RegisterDescriptor	reg,
		const BaseSemantics::SValuePtr &	a
	)

overridevirtual

Writes a value to a register.

The base implementation simply delegates to the current semantic State, which probably delegates to a register state, but subclasses are welcome to override this behavior at any level.

As with readRegister, writeRegister may need to perform various RISC operations in order to accomplish the task of writing a value to the specified register when the underlying register state doesn't actually store a value for that specific register. The RiscOperations object is passed along for that purpose. See readRegister for more details.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ readMemory()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::readMemory	(	RegisterDescriptor	segreg,
		const BaseSemantics::SValuePtr &	addr,
		const BaseSemantics::SValuePtr &	dflt,
		const BaseSemantics::SValuePtr &	cond
	)

overridevirtual

Reads a value from memory.

The implementation (in subclasses) will typically delegate much of the work to the current state's readMemory method.

A MemoryState will implement storage for memory locations and might impose certain restrictions, such as "all memory values must be eight bits". However, the readMemory should not have these constraints so that it can be called from a variety of Dispatcher subclass (e.g., the DispatcherX86 class assumes that readMemory is capable of reading 32-bit values from little-endian memory). The designers of the MemoryState, State, and RiscOperators should collaborate to decide which layer (RiscOperators, State, or MemoryState) is reponsible for combining individual memory locations into larger values. A RiscOperators object is passed along the chain of delegations for this purpose. The RiscOperators might also contain other data that's important during the process, such as an SMT solver.

The segreg argument is an optional segment register. Most architectures have a flat virtual address space and will pass a default-constructed register descriptor whose is_valid() method returns false.

The cond argument is a Boolean value that indicates whether this is a true read operation. If cond can be proven to be false then the read is a no-op and returns an arbitrary value.

The dflt argument determines the size of the value to be read. This argument is also passed along to the lower layers so that they can, if they desire, use it to initialize memory that has never been read or written before.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ peekMemory()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::peekMemory	(	RegisterDescriptor	segreg,
		const BaseSemantics::SValuePtr &	addr,
		const BaseSemantics::SValuePtr &	dflt
	)

overridevirtual

Read memory without side effects.

This is a lower-level operation than readMemory in that it doesn't cause any side effects in the memory state. In all other respects, it's similar to readMemory.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ writeMemory()

virtual void Rose::BinaryAnalysis::InstructionSemantics::SourceAstSemantics::RiscOperators::writeMemory	(	RegisterDescriptor	segreg,
		const BaseSemantics::SValuePtr &	addr,
		const BaseSemantics::SValuePtr &	data,
		const BaseSemantics::SValuePtr &	cond
	)

overridevirtual

Writes a value to memory.

The implementation (in subclasses) will typically delegate much of the work to the current state's writeMemory method.

The segreg argument is an optional segment register. Most architectures have a flat virtual address space and will pass a default-constructed register descriptor whose is_valid() method returns false.

The cond argument is a Boolean value that indicates whether this is a true write operation. If cond can be proved to be false then writeMemory is a no-op.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

The documentation for this class was generated from the following file:

SourceAstSemantics.h

Description

Classes

Public Types

Public Member Functions

Static Public Member Functions

Protected Member Functions

Member Typedef Documentation

◆ Super

◆ Ptr

◆ SideEffects

Member Function Documentation

◆ instanceFromProtoval()

◆ instanceFromState()

◆ create() [1/2]

◆ create() [2/2]

◆ promote()

◆ saveSideEffect()

◆ substitute()

◆ sideEffects()

◆ registerVariableName()

◆ haltExecution()

◆ makeMask()

◆ unspecified_()

◆ hlt()

◆ cpuid()

◆ rdtsc()

◆ and_()

◆ or_()

◆ xor_()

◆ invert()

◆ extract()

◆ concat()

◆ leastSignificantSetBit()

◆ mostSignificantSetBit()

◆ rotateLeft()

◆ rotateRight()

◆ shiftLeft()

◆ shiftRight()

◆ shiftRightArithmetic()

◆ equalToZero()

◆ iteWithStatus()

◆ unsignedExtend()

◆ signExtend()

◆ add()

◆ addWithCarries()

◆ negate()

◆ signedDivide()

◆ signedModulo()

◆ signedMultiply()

◆ unsignedDivide()

◆ unsignedModulo()

◆ unsignedMultiply()

◆ interrupt()

◆ readRegister()

◆ peekRegister()

◆ writeRegister()

◆ readMemory()

◆ peekMemory()

◆ writeMemory()