ROSE 0.11.145.147
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Defines RISC operators for the ConcreteSemantics domain.
These RISC operators depend on functionality introduced into the SValue class hierarchy at the ConcreteSemantics::SValue level. Therefore, the prototypical value supplied to the constructor or present in the supplied state object must have a dynamic type which is a ConcreteSemantics::SValue (or subclass).
Each RISC operator should return a newly allocated semantic value rather than trying to re-use an existing one. This will allow the caller to change the value stored there without affecting any of the input arguments. For example, a no-op that returns its argument should be implemented like this:
Definition at line 303 of file ConcreteSemantics.h.
#include <Rose/BinaryAnalysis/InstructionSemantics/ConcreteSemantics.h>
Public Types | |
using | Super = BaseSemantics::RiscOperators |
Base type. | |
using | Ptr = RiscOperatorsPtr |
Shared-ownership pointer. | |
Public Types inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators | |
enum class | IteStatus { NEITHER , A , B , BOTH } |
Status for iteWithStatus operation. More... | |
using | Ptr = RiscOperatorsPtr |
Shared-ownership pointer. | |
Public Member Functions | |
virtual BaseSemantics::RiscOperatorsPtr | create (const BaseSemantics::SValuePtr &protoval, const SmtSolverPtr &solver=SmtSolverPtr()) const override |
Virtual allocating constructor. | |
virtual BaseSemantics::RiscOperatorsPtr | create (const BaseSemantics::StatePtr &, const SmtSolverPtr &solver=SmtSolverPtr()) const override |
Virtual allocating constructor. | |
virtual void | interrupt (int majr, int minr) override |
Unconditionally raise an interrupt. | |
virtual BaseSemantics::SValuePtr | and_ (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override |
Computes bit-wise AND of two values. | |
virtual BaseSemantics::SValuePtr | or_ (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override |
Computes bit-wise OR of two values. | |
virtual BaseSemantics::SValuePtr | xor_ (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override |
Computes bit-wise XOR of two values. | |
virtual BaseSemantics::SValuePtr | invert (const BaseSemantics::SValuePtr &a_) override |
One's complement. | |
virtual BaseSemantics::SValuePtr | extract (const BaseSemantics::SValuePtr &a_, size_t begin_bit, size_t end_bit) override |
Extracts bits from a value. | |
virtual BaseSemantics::SValuePtr | concat (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override |
Concatenates the bits of two values. | |
virtual BaseSemantics::SValuePtr | leastSignificantSetBit (const BaseSemantics::SValuePtr &a_) override |
Returns position of least significant set bit; zero when no bits are set. | |
virtual BaseSemantics::SValuePtr | mostSignificantSetBit (const BaseSemantics::SValuePtr &a_) override |
Returns position of most significant set bit; zero when no bits are set. | |
virtual BaseSemantics::SValuePtr | rotateLeft (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &sa_) override |
Rotate bits to the left. | |
virtual BaseSemantics::SValuePtr | rotateRight (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &sa_) override |
Rotate bits to the right. | |
virtual BaseSemantics::SValuePtr | shiftLeft (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &sa_) override |
Returns arg shifted left. | |
virtual BaseSemantics::SValuePtr | shiftRight (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &sa_) override |
Returns arg shifted right logically (no sign bit). | |
virtual BaseSemantics::SValuePtr | shiftRightArithmetic (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &sa_) override |
Returns arg shifted right arithmetically (with sign bit). | |
virtual BaseSemantics::SValuePtr | equalToZero (const BaseSemantics::SValuePtr &a_) override |
Determines whether a value is equal to zero. | |
virtual BaseSemantics::SValuePtr | iteWithStatus (const BaseSemantics::SValuePtr &sel_, const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_, IteStatus &) override |
If-then-else with status. | |
virtual BaseSemantics::SValuePtr | unsignedExtend (const BaseSemantics::SValuePtr &a_, size_t new_width) override |
Extend (or shrink) operand a so it is nbits wide by adding or removing high-order bits. | |
virtual BaseSemantics::SValuePtr | signExtend (const BaseSemantics::SValuePtr &a_, size_t new_width) override |
Sign extends a value. | |
virtual BaseSemantics::SValuePtr | add (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override |
Adds two integers of equal size. | |
virtual BaseSemantics::SValuePtr | addWithCarries (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_, const BaseSemantics::SValuePtr &c_, BaseSemantics::SValuePtr &carry_out) override |
Add two values of equal size and a carry bit. | |
virtual BaseSemantics::SValuePtr | negate (const BaseSemantics::SValuePtr &a_) override |
Two's complement. | |
virtual BaseSemantics::SValuePtr | signedDivide (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override |
Divides two signed values. | |
virtual BaseSemantics::SValuePtr | signedModulo (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override |
Calculates modulo with signed values. | |
virtual BaseSemantics::SValuePtr | signedMultiply (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override |
Multiplies two signed values. | |
virtual BaseSemantics::SValuePtr | unsignedDivide (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override |
Divides two unsigned values. | |
virtual BaseSemantics::SValuePtr | unsignedModulo (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override |
Calculates modulo with unsigned values. | |
virtual BaseSemantics::SValuePtr | unsignedMultiply (const BaseSemantics::SValuePtr &a_, const BaseSemantics::SValuePtr &b_) override |
Multiply two unsigned values. | |
virtual BaseSemantics::SValuePtr | fpFromInteger (const BaseSemantics::SValuePtr &intValue, SgAsmFloatType *) override |
Construct a floating-point value from an integer value. | |
virtual BaseSemantics::SValuePtr | fpToInteger (const BaseSemantics::SValuePtr &fpValue, SgAsmFloatType *fpType, const BaseSemantics::SValuePtr &dflt) override |
Construct an integer value from a floating-point value. | |
virtual BaseSemantics::SValuePtr | fpAdd (const BaseSemantics::SValuePtr &a, const BaseSemantics::SValuePtr &b, SgAsmFloatType *) override |
Add two floating-point values. | |
virtual BaseSemantics::SValuePtr | fpSubtract (const BaseSemantics::SValuePtr &a, const BaseSemantics::SValuePtr &b, SgAsmFloatType *) override |
Subtract one floating-point value from another. | |
virtual BaseSemantics::SValuePtr | fpMultiply (const BaseSemantics::SValuePtr &a, const BaseSemantics::SValuePtr &b, SgAsmFloatType *) override |
Multiply two floating-point values. | |
virtual BaseSemantics::SValuePtr | fpRoundTowardZero (const BaseSemantics::SValuePtr &a, SgAsmFloatType *) override |
Round toward zero. | |
virtual BaseSemantics::SValuePtr | readMemory (RegisterDescriptor segreg, const BaseSemantics::SValuePtr &addr, const BaseSemantics::SValuePtr &dflt, const BaseSemantics::SValuePtr &cond) override |
Reads a value from memory. | |
virtual BaseSemantics::SValuePtr | peekMemory (RegisterDescriptor segreg, const BaseSemantics::SValuePtr &addr, const BaseSemantics::SValuePtr &dflt) override |
Read memory without side effects. | |
virtual void | writeMemory (RegisterDescriptor segreg, const BaseSemantics::SValuePtr &addr, const BaseSemantics::SValuePtr &data, const BaseSemantics::SValuePtr &cond) override |
Writes a value to memory. | |
Public Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators | |
virtual SValuePtr | protoval () const |
Property: Prototypical semantic value. | |
virtual void | hash (Combinatorics::Hasher &) |
Compute hash of current state. | |
virtual void | startInstruction (SgAsmInstruction *insn) |
Called at the beginning of every instruction. | |
virtual void | finishInstruction (SgAsmInstruction *insn) |
Called at the end of every instruction. | |
virtual void | comment (const std::string &) |
Inject a line comment into debugging streams. | |
virtual SValuePtr | number_ (size_t nbits, uint64_t value) |
Returns a number of the specified bit width. | |
virtual SValuePtr | boolean_ (bool value) |
Returns a Boolean value. | |
virtual SValuePtr | bottom_ (size_t nbits) |
Returns a data-flow bottom value. | |
virtual SValuePtr | filterCallTarget (const SValuePtr &a) |
Invoked to filter call targets. | |
virtual SValuePtr | filterReturnTarget (const SValuePtr &a) |
Invoked to filter return targets. | |
virtual SValuePtr | filterIndirectJumpTarget (const SValuePtr &a) |
Invoked to filter indirect jumps. | |
virtual void | hlt () |
Invoked for the x86 HLT instruction. | |
virtual void | cpuid () |
Invoked for the x86 CPUID instruction. | |
virtual SValuePtr | rdtsc () |
Invoked for the x86 RDTSC instruction. | |
virtual std::pair< SValuePtr, SValuePtr > | split (const SValuePtr &a, size_t splitPoint) |
Split a value into two narrower values. | |
virtual SValuePtr | countLeadingZeros (const SValuePtr &a) |
Count leading zero bits. | |
virtual SValuePtr | countLeadingOnes (const SValuePtr &a) |
Count leading one bits. | |
virtual SValuePtr | reverseElmts (const SValuePtr &a, size_t elmtNBits) |
Reverse parts of a value. | |
virtual SValuePtr | ite (const SValuePtr &cond, const SValuePtr &a, const SValuePtr &b) final |
If-then-else. | |
virtual SValuePtr | addCarry (const SValuePtr &a, const SValuePtr &b, SValuePtr &carryOut, SValuePtr &overflowed) |
Adds two integers of equal size and carry. | |
virtual SValuePtr | subtract (const SValuePtr &minuend, const SValuePtr &subtrahend) |
Subtract one value from another. | |
virtual SValuePtr | subtractCarry (const SValuePtr &minuend, const SValuePtr &subtrahend, SValuePtr &carryOut, SValuePtr &overflowed) |
Subtract one value from another and carry. | |
virtual void | interrupt (const SValuePtr &majr, const SValuePtr &minr, const SValuePtr &raise) |
Invoked for instructions that cause an interrupt. | |
virtual void | raiseInterrupt (unsigned majorNumber, unsigned minorNumber, const SValuePtr &raise) |
Conditionally raise an interrupt. | |
virtual SValuePtr | fpConvert (const SValuePtr &a, SgAsmFloatType *aType, SgAsmFloatType *retType) |
Convert from one floating-point type to another. | |
virtual SValuePtr | fpIsNan (const SValuePtr &fpValue, SgAsmFloatType *fpType) |
Whether a floating-point value is a special not-a-number bit pattern. | |
virtual SValuePtr | fpIsDenormalized (const SValuePtr &fpValue, SgAsmFloatType *fpType) |
Whether a floating-point value is denormalized. | |
virtual SValuePtr | fpIsZero (const SValuePtr &fpValue, SgAsmFloatType *fpType) |
Whether a floating-point value is equal to zero. | |
virtual SValuePtr | fpIsInfinity (const SValuePtr &fpValue, SgAsmFloatType *fpType) |
Whether a floating-point value is infinity. | |
virtual SValuePtr | fpSign (const SValuePtr &fpValue, SgAsmFloatType *fpType) |
Sign of floating-point value. | |
virtual SValuePtr | fpEffectiveExponent (const SValuePtr &fpValue, SgAsmFloatType *fpType) |
Exponent of floating-point value. | |
virtual SValuePtr | fpDivide (const SValuePtr &a, const SValuePtr &b, SgAsmFloatType *fpType) |
Divide one floating-point value by another. | |
virtual SValuePtr | fpSquareRoot (const SValuePtr &a, SgAsmFloatType *fpType) |
Square root. | |
virtual SValuePtr | reinterpret (const SValuePtr &a, SgAsmType *retType) |
Reinterpret an expression as a different type. | |
virtual SValuePtr | convert (const SValuePtr &a, SgAsmType *srcType, SgAsmType *dstType) |
Convert value from one type to another. | |
virtual void | writeRegister (RegisterDescriptor reg, const SValuePtr &a) |
Writes a value to a register. | |
virtual SmtSolverPtr | solver () const |
Property: Satisfiability module theory (SMT) solver. | |
virtual void | solver (const SmtSolverPtr &s) |
Property: Satisfiability module theory (SMT) solver. | |
const HotPatch & | hotPatch () const |
Property: Post-instruction hot patches. | |
HotPatch & | hotPatch () |
Property: Post-instruction hot patches. | |
void | hotPatch (const HotPatch &hp) |
Property: Post-instruction hot patches. | |
virtual StatePtr | currentState () const |
Property: Current semantic state. | |
virtual void | currentState (const StatePtr &s) |
Property: Current semantic state. | |
virtual StatePtr | initialState () const |
Property: Optional lazily updated initial state. | |
virtual void | initialState (const StatePtr &s) |
Property: Optional lazily updated initial state. | |
virtual const std::string & | name () const |
Property: Name used for debugging. | |
virtual void | name (const std::string &s) |
Property: Name used for debugging. | |
void | print (std::ostream &stream, const std::string prefix="") const |
Print multi-line output for this object. | |
virtual void | print (std::ostream &stream, Formatter &fmt) const |
Print multi-line output for this object. | |
WithFormatter | with_format (Formatter &fmt) |
Used for printing RISC operators with formatting. | |
WithFormatter | operator+ (Formatter &fmt) |
Used for printing RISC operators with formatting. | |
WithFormatter | operator+ (const std::string &linePrefix) |
Used for printing RISC operators with formatting. | |
virtual size_t | nInsns () const |
Property: Number of instructions processed. | |
virtual void | nInsns (size_t n) |
Property: Number of instructions processed. | |
virtual SgAsmInstruction * | currentInstruction () const |
Property: Current instruction. | |
virtual void | currentInstruction (SgAsmInstruction *insn) |
Property: Current instruction. | |
virtual bool | isNoopRead () const |
Property: No-op read. | |
virtual void | isNoopRead (bool b) |
Property: No-op read. | |
virtual SValuePtr | undefined_ (size_t nbits) |
Returns a new undefined value. | |
virtual SValuePtr | unspecified_ (size_t nbits) |
Returns a new undefined value. | |
virtual SValuePtr | concatLoHi (const SValuePtr &lowBits, const SValuePtr &highBits) |
Aliases for concatenation. | |
virtual SValuePtr | concatHiLo (const SValuePtr &highBits, const SValuePtr &lowBits) |
Aliases for concatenation. | |
virtual SValuePtr | isEqual (const SValuePtr &a, const SValuePtr &b) |
Equality comparison. | |
virtual SValuePtr | isNotEqual (const SValuePtr &a, const SValuePtr &b) |
Equality comparison. | |
virtual SValuePtr | isUnsignedLessThan (const SValuePtr &a, const SValuePtr &b) |
Comparison for unsigned values. | |
virtual SValuePtr | isUnsignedLessThanOrEqual (const SValuePtr &a, const SValuePtr &b) |
Comparison for unsigned values. | |
virtual SValuePtr | isUnsignedGreaterThan (const SValuePtr &a, const SValuePtr &b) |
Comparison for unsigned values. | |
virtual SValuePtr | isUnsignedGreaterThanOrEqual (const SValuePtr &a, const SValuePtr &b) |
Comparison for unsigned values. | |
virtual SValuePtr | isSignedLessThan (const SValuePtr &a, const SValuePtr &b) |
Comparison for signed values. | |
virtual SValuePtr | isSignedLessThanOrEqual (const SValuePtr &a, const SValuePtr &b) |
Comparison for signed values. | |
virtual SValuePtr | isSignedGreaterThan (const SValuePtr &a, const SValuePtr &b) |
Comparison for signed values. | |
virtual SValuePtr | isSignedGreaterThanOrEqual (const SValuePtr &a, const SValuePtr &b) |
Comparison for signed values. | |
virtual SValuePtr | readRegister (RegisterDescriptor reg) |
Reads a value from a register. | |
virtual SValuePtr | readRegister (RegisterDescriptor reg, const SValuePtr &dflt) |
Reads a value from a register. | |
virtual SValuePtr | peekRegister (RegisterDescriptor, const SValuePtr &dflt) |
Obtain a register value without side effects. | |
SValuePtr | peekRegister (RegisterDescriptor reg) |
Obtain a register value without side effects. | |
Static Public Member Functions | |
static RiscOperatorsPtr | instanceFromRegisters (const RegisterDictionaryPtr &, const SmtSolverPtr &solver=SmtSolverPtr()) |
Allocating constructor. | |
static RiscOperatorsPtr | instanceFromProtoval (const BaseSemantics::SValuePtr &protoval, const SmtSolverPtr &solver=SmtSolverPtr()) |
Allocating constructor. | |
static RiscOperatorsPtr | instanceFromState (const BaseSemantics::StatePtr &, const SmtSolverPtr &solver=SmtSolverPtr()) |
Allocating constructor. | |
static RiscOperatorsPtr | promote (const BaseSemantics::RiscOperatorsPtr &) |
Run-time promotion of a base RiscOperators pointer to concrete operators. | |
Static Public Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators | |
static RiscOperatorsPtr | promote (const RiscOperatorsPtr &x) |
Protected Member Functions | |
RiscOperators (const BaseSemantics::SValuePtr &protoval, const SmtSolverPtr &) | |
RiscOperators (const BaseSemantics::StatePtr &, const SmtSolverPtr &) | |
SValuePtr | svalueNumber (size_t nbits, uint64_t value) |
SValuePtr | svalueNumber (const Sawyer::Container::BitVector &) |
SValuePtr | svalueBoolean (bool b) |
SValuePtr | svalueZero (size_t nbits) |
BaseSemantics::SValuePtr | readOrPeekMemory (RegisterDescriptor segreg, const BaseSemantics::SValuePtr &address, const BaseSemantics::SValuePtr &dflt, bool allowSideEffects) |
double | exprToDouble (const BaseSemantics::SValuePtr &expr, SgAsmFloatType *) |
BaseSemantics::SValuePtr | doubleToExpr (double d, SgAsmFloatType *) |
Protected Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators | |
RiscOperators (const SValuePtr &protoval, const SmtSolverPtr &solver=SmtSolverPtr()) | |
RiscOperators (const StatePtr &state, const SmtSolverPtr &solver=SmtSolverPtr()) | |
using Rose::BinaryAnalysis::InstructionSemantics::ConcreteSemantics::RiscOperators::Super = BaseSemantics::RiscOperators |
Base type.
Definition at line 306 of file ConcreteSemantics.h.
using Rose::BinaryAnalysis::InstructionSemantics::ConcreteSemantics::RiscOperators::Ptr = RiscOperatorsPtr |
Shared-ownership pointer.
Definition at line 309 of file ConcreteSemantics.h.
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virtual |
Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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static |
Allocating constructor.
Instantiates a new object and configures it to use semantic values and states that are defaults for ConcreteSemantics.
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static |
Allocating constructor.
Instantiates a new object with specified prototypical values. An SMT solver may be specified as the second argument because the base class expects one, but it is not used for ConcreteSemantics. See SmtSolver for details.
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Allocating constructor.
Instantiates a new RiscOperators object with specified state. An SMT solver may be specified as the second argument because the base class expects one, but it is not used for concrete semantics. See solver for details.
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overridevirtual |
Virtual allocating constructor.
The protoval
is a prototypical semantic value that is used as a factory to create additional values as necessary via its virtual constructors. The state upon which the RISC operations operate must be set by modifying the currentState property. An optional SMT solver may be specified (see solver).
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Virtual allocating constructor.
The supplied state
is that upon which the RISC operations operate and is also used to define the prototypical semantic value. Other states can be supplied by setting currentState. The prototypical semantic value is used as a factory to create additional values as necessary via its virtual constructors. An optional SMT solver may be specified (see solver).
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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static |
Run-time promotion of a base RiscOperators pointer to concrete operators.
This is a checked conversion–it will fail if x
does not point to a ConcreteSemantics::RiscOperators object.
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Unconditionally raise an interrupt.
The major and minor numbers are architecture specific. For instance, an x86 INT instruction uses major number zero and the minor number is the interrupt number (e.g., 0x80 for Linux system calls), while an x86 SYSENTER instruction uses major number one.
The base implementation does one of two things. If the current state has an interrupt sub-state then the specified interrupt is raised in that state by setting that interrupt to true. Otherwise, the base implementation does nothing.
Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Computes bit-wise AND of two values.
The operands must both have the same width; the result must be the same width as the operands.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Computes bit-wise OR of two values.
The operands a
and b
must have the same width; the return value width will be the same as a
and b
.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Computes bit-wise XOR of two values.
The operands a
and b
must have the same width; the result will be the same width as a
and b
.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
One's complement.
The result will be the same size as the operand.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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Extracts bits from a value.
The specified bits from begin_bit (inclusive) through end_bit (exclusive) are copied into the low-order bits of the return value (other bits in the return value are cleared). The least significant bit is number zero. The begin_bit and end_bit values must be valid for the width of a
.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Concatenates the bits of two values.
The bits of lowBits
and highBits
are concatenated so that the result has lowBits
in the low-order bits and highBits
in the high order bits. The width of the return value is the sum of the widths of lowBits
and highBits
.
Note that the order of arguments for this method is the reverse of the SymbolicExpression concatenation function.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Returns position of least significant set bit; zero when no bits are set.
The return value will have the same width as the operand, although this can be safely truncated to the log-base-2 + 1 width.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Returns position of most significant set bit; zero when no bits are set.
The return value will have the same width as the operand, although this can be safely truncated to the log-base-2 + 1 width.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Rotate bits to the left.
The return value will have the same width as operand a
. The nbits
is interpreted as unsigned. The behavior is modulo the width of a
regardless of whether the implementation makes that a special case or handles it naturally.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Rotate bits to the right.
The return value will have the same width as operand a
. The nbits
is interpreted as unsigned. The behavior is modulo the width of a
regardless of whether the implementation makes that a special case or handles it naturally.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Returns arg shifted left.
The return value will have the same width as operand a
. The nbits
is interpreted as unsigned. New bits shifted into the value are zero. If nbits
is equal to or larger than the width of a
then the result is zero.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Returns arg shifted right logically (no sign bit).
The return value will have the same width as operand a
. The nbits
is interpreted as unsigned. New bits shifted into the value are zero. If nbits
is equal to or larger than the width of a
then the result is zero.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Returns arg shifted right arithmetically (with sign bit).
The return value will have the same width as operand a
. The nbits
is interpreted as unsigned. New bits shifted into the value are the same as the most significant bit (the "sign bit"). If nbits
is equal to or larger than the width of a
then the result has all bits cleared or all bits set depending on whether the most significant bit was originally clear or set.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Determines whether a value is equal to zero.
Returns true, false, or undefined (in the semantic domain) depending on whether argument is zero.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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If-then-else with status.
Returns operand a
if cond
is true, operand b
if cond
is false, or some other value if the condition is unknown. The condition
must be one bit wide; the widths of a
and b
must be equal; the return value width will be the same as a
and b
.
The status
is an output that indicates how the main return value was determined.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Extend (or shrink) operand a
so it is nbits
wide by adding or removing high-order bits.
Added bits are always zeros. The result will be the specified new_width
.
Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Sign extends a value.
The result will be the specified new_width
, which must be at least as large as the original width.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Adds two integers of equal size.
The width of a
and b
must be equal; the return value will have the same width as a
and b
.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Add two values of equal size and a carry bit.
Carry information is returned via carry_out argument. The carry_out value is the tick marks that are written above the first addend when doing long arithmetic like a 2nd grader would do (of course, they'd probably be adding two base-10 numbers). For instance, when adding 00110110 and 11100100:
The carry_out value is 11100100.
The width of a
and b
must be equal; c
must have a width of one bit; the return value and carry_out
will be the same width as a
and b
. The carry_out
value is allocated herein.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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Two's complement.
The return value will have the same width as the operand.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Divides two signed values.
The width of the result will be the same as the width of the dividend
.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Calculates modulo with signed values.
The width of the result will be the same as the width of operand b
.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Multiplies two signed values.
The width of the result will be the sum of the widths of a
and b
.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Divides two unsigned values.
The width of the result is the same as the width of the dividend
.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Calculates modulo with unsigned values.
The width of the result is the same as the width of operand b
.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Multiply two unsigned values.
The width of the result is the sum of the widths of a
and b
.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Construct a floating-point value from an integer value.
Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Construct an integer value from a floating-point value.
The bits of fpValue
are interpreted according to the fpType
and converted to a signed integer value that fits in integerWidth
bits. This is done by truncating the fractional part of the floating point number, thus rounding toward zero. If fpValue
is not a number then dflt
is returned.
Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Add two floating-point values.
Adds two floating-point values that have the same type and returns the sum in the same type.
Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Subtract one floating-point value from another.
Subtracts b
from a
and returns the difference. All three floating-point values have the same type. The default implementation is in terms of negate and add.
Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Multiply two floating-point values.
Multiplies two floating-point values and returns the product. All three values have the same type.
Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Round toward zero.
Truncate the fractional part of the floating point number.
Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Reads a value from memory.
The implementation (in subclasses) will typically delegate much of the work to the current state's readMemory method.
A MemoryState will implement storage for memory locations and might impose certain restrictions, such as "all memory values must be eight bits". However, the readMemory should not have these constraints so that it can be called from a variety of Dispatcher subclass (e.g., the DispatcherX86 class assumes that readMemory is capable of reading 32-bit values from little-endian memory). The designers of the MemoryState, State, and RiscOperators should collaborate to decide which layer (RiscOperators, State, or MemoryState) is reponsible for combining individual memory locations into larger values. A RiscOperators object is passed along the chain of delegations for this purpose. The RiscOperators might also contain other data that's important during the process, such as an SMT solver.
The segreg
argument is an optional segment register. Most architectures have a flat virtual address space and will pass a default-constructed register descriptor whose is_valid() method returns false.
The cond
argument is a Boolean value that indicates whether this is a true read operation. If cond
can be proven to be false then the read is a no-op and returns an arbitrary value.
The dflt
argument determines the size of the value to be read. This argument is also passed along to the lower layers so that they can, if they desire, use it to initialize memory that has never been read or written before.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Read memory without side effects.
This is a lower-level operation than readMemory in that it doesn't cause any side effects in the memory state. In all other respects, it's similar to readMemory.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.
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overridevirtual |
Writes a value to memory.
The implementation (in subclasses) will typically delegate much of the work to the current state's writeMemory method.
The segreg
argument is an optional segment register. Most architectures have a flat virtual address space and will pass a default-constructed register descriptor whose is_valid() method returns false.
The cond
argument is a Boolean value that indicates whether this is a true write operation. If cond
can be proved to be false then writeMemory is a no-op.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.