1#ifndef ROSE_BinaryAnalysis_Architecture_Base_H
2#define ROSE_BinaryAnalysis_Architecture_Base_H
3#include <featureTests.h>
4#ifdef ROSE_ENABLE_BINARY_ANALYSIS
6#include <Rose/BinaryAnalysis/Alignment.h>
7#include <Rose/BinaryAnalysis/Architecture/BasicTypes.h>
8#include <Rose/BinaryAnalysis/ByteOrder.h>
9#include <Rose/BinaryAnalysis/CallingConvention/BasicTypes.h>
10#include <Rose/BinaryAnalysis/Disassembler/BasicTypes.h>
11#include <Rose/BinaryAnalysis/InstructionSemantics/BaseSemantics/BasicTypes.h>
12#include <Rose/BinaryAnalysis/Unparser/Base.h>
14#include <Sawyer/Interval.h>
15#include <Sawyer/Optional.h>
18namespace BinaryAnalysis {
22class Base:
public std::enable_shared_from_this<Base> {
33 size_t bytesPerWord_ = 0;
62 const std::string&
name()
const;
261 virtual bool isFunctionCallFast(
const std::vector<SgAsmInstruction*>&, rose_addr_t *target, rose_addr_t *ret)
const;
262 virtual bool isFunctionCallSlow(
const std::vector<SgAsmInstruction*>&, rose_addr_t *target, rose_addr_t *ret)
const;
330 virtual std::vector<Partitioner2::FunctionPrologueMatcherPtr>
338 virtual std::vector<Partitioner2::BasicBlockCallbackPtr>
Information about alignments.
Base class for architecture definitions.
virtual const CallingConvention::Dictionary & callingConventions() const
Property: Calling convention definitions.
ByteOrder::Endianness byteOrder() const
Property: Byte order for memory.
virtual RegisterDictionaryPtr registerDictionary() const =0
Property: Register dictionary.
virtual std::string instructionDescription(const SgAsmInstruction *) const
Description for an instruction.
virtual bool matchesName(const std::string &) const
Tests whether this architecture matches a name.
AddressSet getSuccessors(const std::vector< SgAsmInstruction * > &basicBlock, bool &complete) const
Control flow successors for a basic block.
size_t bitsPerWord() const
Property: Word size.
virtual bool terminatesBasicBlock(SgAsmInstruction *) const =0
Determines whether the specified instruction normally terminates a basic block.
virtual std::vector< Partitioner2::BasicBlockCallbackPtr > basicBlockCreationHooks(const Partitioner2::EnginePtr &) const
Architecture-specific basic block callbacks for partitioning.
virtual std::string instructionMnemonic(const SgAsmInstruction *) const =0
Mnemonic for an instruction.
virtual Disassembler::BasePtr newInstructionDecoder() const =0
Construct and return a new instruction decoder.
virtual bool isFunctionCallSlow(const std::vector< SgAsmInstruction * > &, rose_addr_t *target, rose_addr_t *ret) const
Returns true if the specified basic block looks like a function call.
virtual AddressSet getSuccessors(const std::vector< SgAsmInstruction * > &basicBlock, bool &complete, const MemoryMapPtr &initial_memory) const
Control flow successors for a basic block.
virtual Unparser::BasePtr newUnparser() const =0
Construct and return a new instruction unparser.
BaseConstPtr ConstPtr
Reference counting pointer to const object.
const Sawyer::Optional< size_t > & registrationId() const
Property: Registration identification number.
virtual Sawyer::Container::Interval< size_t > bytesPerInstruction() const =0
Valid sizes for encoded machine instructions.
size_t bytesPerWord() const
Property: Word size.
virtual Sawyer::Optional< rose_addr_t > branchTarget(SgAsmInstruction *) const
Obtains the virtual address for a branching instruction.
virtual bool isUnknown(const SgAsmInstruction *) const =0
Returns true if the instruction is the special "unknown" instruction.
const std::string & name() const
Property: Architecture definition name.
virtual bool isFunctionReturnSlow(const std::vector< SgAsmInstruction * > &) const
Returns true if the specified basic block looks like a function return.
virtual Alignment instructionAlignment() const =0
Alignment for encoded machine instructions.
virtual std::string toString(const SgAsmInstruction *) const
Unparse an instruction to a string.
virtual std::vector< Partitioner2::FunctionPrologueMatcherPtr > functionPrologueMatchers(const Partitioner2::EnginePtr &) const
Instruction patterns matching function prologues.
virtual AddressSet getSuccessors(SgAsmInstruction *, bool &complete) const
Control flow successors for a single instruction.
virtual std::string toStringNoAddr(const SgAsmInstruction *) const
Unparse an instruction to a string.
virtual RegisterDictionaryPtr interruptDictionary() const
Property: Interrupt dictionary.
virtual bool isFunctionCallFast(const std::vector< SgAsmInstruction * > &, rose_addr_t *target, rose_addr_t *ret) const
Returns true if the specified basic block looks like a function call.
void registrationId(const Sawyer::Optional< size_t > &)
Property: Registration identification number.
virtual bool isFunctionReturnFast(const std::vector< SgAsmInstruction * > &) const
Returns true if the specified basic block looks like a function return.
BasePtr Ptr
Reference counting pointer.
virtual InstructionSemantics::BaseSemantics::DispatcherPtr newInstructionDispatcher(const InstructionSemantics::BaseSemantics::RiscOperatorsPtr &) const
Construct and return a new instruction dispatcher.
bool instructionsCanOverlap() const
Whether instructions can overlap in memory.
virtual bool matchesHeader(SgAsmGenericHeader *) const
Tests whether this architecture matches a file header.
Implements cache data members.
Range of values delimited by endpoints.
Holds a value or nothing.
Base class for machine instructions.
std::shared_ptr< Base > BasePtr
Reference counted pointer for Architecture::Base.
std::shared_ptr< const Base > BaseConstPtr
Reference counted pointer for Architecture::Base.
@ ORDER_UNSPECIFIED
Endianness is unspecified and unknown.
std::vector< DefinitionPtr > Dictionary
An ordered collection of calling convention definitions.
boost::shared_ptr< RiscOperators > RiscOperatorsPtr
Shared-ownership pointer to a RISC operators object.
boost::shared_ptr< Dispatcher > DispatcherPtr
Shared-ownership pointer to a semantics instruction dispatcher.
const char * Architecture(int64_t)
Convert Rose::BinaryAnalysis::Disassembler::Mips::Decoder::Architecture enum constant to a string.