ROSE  0.11.98.0
Disassembler/Base.h
1 #ifndef ROSE_BinaryAnalysis_Disassembler_Base_H
2 #define ROSE_BinaryAnalysis_Disassembler_Base_H
3 #include <featureTests.h>
4 #ifdef ROSE_ENABLE_BINARY_ANALYSIS
5 
6 #include <Rose/BinaryAnalysis/CallingConvention.h>
7 #include <Rose/BinaryAnalysis/Disassembler/BasicTypes.h>
8 #include <Rose/BinaryAnalysis/Disassembler/Exception.h>
9 #include <Rose/BinaryAnalysis/InstructionSemantics/BaseSemantics.h>
10 #include <Rose/BinaryAnalysis/MemoryMap.h>
11 #include <Rose/BinaryAnalysis/RegisterDictionary.h>
12 #include <Rose/BinaryAnalysis/Unparser/Settings.h>
13 #include <Rose/Diagnostics.h>
14 
15 #include "integerOps.h"
16 #include "Map.h"
17 
18 #include <boost/serialization/access.hpp>
19 #include <boost/serialization/string.hpp>
20 #include <boost/serialization/version.hpp>
21 
22 // REG_SP possibly defined on __sun
23 // REG_LINK possibly defined on Windows
24 #undef REG_SP
25 #undef REG_LINK
26 
27 namespace Rose {
28 namespace BinaryAnalysis {
29 namespace Disassembler {
30 
33 
55 class Base: public Sawyer::SharedObject {
57  // Types
59 public:
60  using Ptr = BasePtr;
61 
63  // Data members
65 private:
66  CallingConvention::Dictionary callingConventions_;
67 
68 protected:
70  RegisterDescriptor REG_IP, REG_SP, REG_SS, REG_SF, REG_LINK;
71  ByteOrder::Endianness p_byteOrder = ByteOrder::ORDER_LSB;
72  size_t p_wordSizeBytes = 4;
73  std::string p_name;
74  size_t instructionAlignment_ = 1;
78 
79 public:
80 
81 
83  // Serialization
85 #ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
86 private:
87  friend class boost::serialization::access;
88 
89  template<class S>
90  void serialize(S &s, const unsigned version) {
91  s & BOOST_SERIALIZATION_NVP(p_registers);
92  s & BOOST_SERIALIZATION_NVP(REG_IP);
93  s & BOOST_SERIALIZATION_NVP(REG_SS);
94  if (version >= 1)
95  s & BOOST_SERIALIZATION_NVP(REG_SF);
96  s & BOOST_SERIALIZATION_NVP(p_byteOrder);
97  s & BOOST_SERIALIZATION_NVP(p_wordSizeBytes);
98  s & BOOST_SERIALIZATION_NVP(p_name);
99  if (version >= 2)
100  s & BOOST_SERIALIZATION_NVP(instructionAlignment_);
101  }
102 #endif
103 
104 
106  // Constructors
108 protected:
109  Base() {}
110 
111 public:
112  virtual ~Base() {}
113 
115  // Registration and lookup methods
117 
118 public:
124  virtual bool canDisassemble(SgAsmGenericHeader*) const = 0;
125 
129  const std::string& name() const {
130  return p_name;
131  }
132  void name(const std::string &s) {
133  p_name = s;
134  }
140  virtual Ptr clone() const = 0;
141 
142 
143  /***************************************************************************************************************************
144  * Disassembler properties and settings
145  ***************************************************************************************************************************/
146 public:
151  virtual Unparser::BasePtr unparser() const = 0;
152 
156  ByteOrder::Endianness byteOrder() const { return p_byteOrder; }
157  void byteOrder(ByteOrder::Endianness sex) { p_byteOrder = sex; }
163  size_t wordSizeBytes() const { return p_wordSizeBytes; }
164  void wordSizeBytes(size_t nbytes) { p_wordSizeBytes = nbytes; }
170  size_t instructionAlignment() const;
171 
184  p_registers = rdict;
185  }
187  return p_registers;
188  }
189 
195  const CallingConvention::Dictionary& callingConventions() const { return callingConventions_; }
196  CallingConvention::Dictionary& callingConventions() { return callingConventions_; }
197  void callingConventions(const CallingConvention::Dictionary &d) { callingConventions_ = d; }
202  ASSERT_forbid(REG_IP.isEmpty());
203  return REG_IP;
204  }
205 
208  ASSERT_forbid(REG_SP.isEmpty());
209  return REG_SP;
210  }
211 
214  return REG_SF; // need not be valid
215  }
216 
220  return REG_SS; // need not be valid
221  }
222 
227  return REG_LINK; // need not be valid
228  }
229 
236  return p_proto_dispatcher;
237  }
238 
239  /***************************************************************************************************************************
240  * Instruction disassembly functions
241  ***************************************************************************************************************************/
242 public:
253  virtual SgAsmInstruction *disassembleOne(const MemoryMap::Ptr &map, rose_addr_t start_va, AddressSet *successors=NULL) = 0;
254 
261  SgAsmInstruction *disassembleOne(const unsigned char *buf, rose_addr_t buf_va, size_t buf_size, rose_addr_t start_va,
262  AddressSet *successors=NULL);
263 
264 
265  /***************************************************************************************************************************
266  * Miscellaneous methods
267  ***************************************************************************************************************************/
268 public:
273 
277  void mark_referenced_instructions(SgAsmInterpretation*, const MemoryMap::Ptr&, const InstructionMap&);
278 
284  AddressSet get_block_successors(const InstructionMap&, bool &complete/*out*/);
285 
291  static SgAsmInstruction *find_instruction_containing(const InstructionMap &insns, rose_addr_t va);
292 };
293 
294 } // namespace
295 } // namespace
296 } // namespace
297 
298 // Class versions must be at global scope
299 BOOST_CLASS_VERSION(Rose::BinaryAnalysis::Disassembler::Base, 2);
300 
301 #endif
302 #endif
size_t instructionAlignment() const
Property: Instruction alignment requirement.
virtual bool canDisassemble(SgAsmGenericHeader *) const =0
Predicate determining the suitability of a disassembler for a specific file header.
static SgAsmInstruction * find_instruction_containing(const InstructionMap &insns, rose_addr_t va)
Finds the highest-address instruction that contains the byte at the specified virtual address...
virtual RegisterDescriptor instructionPointerRegister() const
Returns the register that points to instructions.
virtual Unparser::BasePtr unparser() const =0
Unparser.
Base class for machine instructions.
void wordSizeBytes(size_t nbytes)
Property: Basic word size in bytes.
virtual Ptr clone() const =0
Creates a new copy of a disassembler.
RegisterDescriptor REG_LINK
Register descriptors initialized during construction.
RegisterDictionaryPtr p_registers
Description of registers available for this platform.
InstructionSemantics::BaseSemantics::DispatcherPtr p_proto_dispatcher
Prototypical dispatcher for creating real dispatchers.
void registerDictionary(const RegisterDictionaryPtr &rdict)
Properties: Register dictionary.
AddressSet get_block_successors(const InstructionMap &, bool &complete)
Calculates the successor addresses of a basic block and adds them to a successors set...
const CallingConvention::Dictionary & callingConventions() const
Property: Calling convention dictionary.
Main namespace for the ROSE library.
ByteOrder::Endianness byteOrder() const
Property: Byte order of instructions in memory.
void callingConventions(const CallingConvention::Dictionary &d)
Properties: Register dictionary.
boost::shared_ptr< Dispatcher > DispatcherPtr
Shared-ownership pointer to a semantics instruction dispatcher.
CallingConvention::Dictionary & callingConventions()
Properties: Register dictionary.
size_t instructionAlignment_
Positive alignment constraint for instruction addresses.
Base class for container file headers.
std::vector< Definition::Ptr > Dictionary
A ordered collection of calling convention definitions.
Describes (part of) a physical CPU register.
virtual RegisterDescriptor stackPointerRegister() const
Returns the register that points to the stack.
size_t p_wordSizeBytes
Basic word size in bytes.
virtual RegisterDescriptor stackFrameRegister() const
Returns the register that ponts to the stack frame.
Binary analysis.
size_t wordSizeBytes() const
Property: Basic word size in bytes.
ByteOrder::Endianness p_byteOrder
Byte order of instructions in memory.
virtual RegisterDescriptor stackSegmentRegister() const
Returns the segment register for accessing the stack.
void mark_referenced_instructions(SgAsmInterpretation *, const MemoryMap::Ptr &, const InstructionMap &)
Marks parts of the file that correspond to instructions as having been referenced.
Base class for reference counted objects.
Definition: SharedObject.h:64
void byteOrder(ByteOrder::Endianness sex)
Property: Byte order of instructions in memory.
virtual SgAsmInstruction * makeUnknownInstruction(const Exception &)=0
Makes an unknown instruction from an exception.
virtual RegisterDescriptor callReturnRegister() const
Returns the register that holds the return address for a function.
const std::string & name() const
Property: Name by which disassembler is registered.
const Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::DispatcherPtr & dispatcher() const
Return an instruction semantics dispatcher if possible.
std::string p_name
Name by which this dissassembler is registered.
Sawyer::SharedPointer< Base > BasePtr
Reference counted pointer for disassemblers.
virtual SgAsmInstruction * disassembleOne(const MemoryMap::Ptr &map, rose_addr_t start_va, AddressSet *successors=NULL)=0
This is the lowest level disassembly function and is implemented in the architecture-specific subclas...
bool isEmpty() const
Predicate returns true if the width is zero.
RegisterDictionaryPtr registerDictionary() const
Properties: Register dictionary.
Represents an interpretation of a binary container.
Map< rose_addr_t, SgAsmInstruction * > InstructionMap
The InstructionMap is a mapping from (absolute) virtual address to disassembled instruction.
Virtual base class for instruction disassemblers.
void name(const std::string &s)
Property: Name by which disassembler is registered.