ROSE  0.11.109.0
Disassembler/Base.h
1 #ifndef ROSE_BinaryAnalysis_Disassembler_Base_H
2 #define ROSE_BinaryAnalysis_Disassembler_Base_H
3 #include <featureTests.h>
4 #ifdef ROSE_ENABLE_BINARY_ANALYSIS
5 
6 #include <Rose/BinaryAnalysis/CallingConvention.h>
7 #include <Rose/BinaryAnalysis/Disassembler/BasicTypes.h>
8 #include <Rose/BinaryAnalysis/Disassembler/Exception.h>
9 #include <Rose/BinaryAnalysis/InstructionSemantics/BaseSemantics.h>
10 #include <Rose/BinaryAnalysis/MemoryMap.h>
11 #include <Rose/BinaryAnalysis/Unparser/Settings.h>
12 #include <Rose/Diagnostics.h>
13 
14 #include "integerOps.h"
15 #include "Map.h"
16 
17 #include <boost/serialization/access.hpp>
18 #include <boost/serialization/string.hpp>
19 #include <boost/serialization/version.hpp>
20 
21 // REG_SP possibly defined on __sun
22 // REG_LINK possibly defined on Windows
23 #undef REG_SP
24 #undef REG_LINK
25 
26 namespace Rose {
27 namespace BinaryAnalysis {
28 namespace Disassembler {
29 
32 
54 class Base: public Sawyer::SharedObject {
56  // Types
58 public:
59  using Ptr = BasePtr;
60 
62  // Data members
64 private:
65  CallingConvention::Dictionary callingConventions_;
66 
67 protected:
69  RegisterDescriptor REG_IP, REG_SP, REG_SS, REG_SF, REG_LINK;
70  ByteOrder::Endianness p_byteOrder = ByteOrder::ORDER_LSB;
71  size_t p_wordSizeBytes = 4;
72  std::string p_name;
73  size_t instructionAlignment_ = 1;
77 
78 public:
79 
80 
82  // Serialization
84 #ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
85 private:
86  friend class boost::serialization::access;
87 
88  template<class S>
89  void serialize(S &s, const unsigned version) {
90  s & BOOST_SERIALIZATION_NVP(p_registers);
91  s & BOOST_SERIALIZATION_NVP(REG_IP);
92  s & BOOST_SERIALIZATION_NVP(REG_SS);
93  if (version >= 1)
94  s & BOOST_SERIALIZATION_NVP(REG_SF);
95  s & BOOST_SERIALIZATION_NVP(p_byteOrder);
96  s & BOOST_SERIALIZATION_NVP(p_wordSizeBytes);
97  s & BOOST_SERIALIZATION_NVP(p_name);
98  if (version >= 2)
99  s & BOOST_SERIALIZATION_NVP(instructionAlignment_);
100  }
101 #endif
102 
103 
105  // Constructors
107 protected:
108  Base() {}
109 
110 public:
111  virtual ~Base() {}
112 
114  // Registration and lookup methods
116 
117 public:
123  virtual bool canDisassemble(SgAsmGenericHeader*) const = 0;
124 
128  const std::string& name() const {
129  return p_name;
130  }
131  void name(const std::string &s) {
132  p_name = s;
133  }
139  virtual Ptr clone() const = 0;
140 
141 
142  /***************************************************************************************************************************
143  * Disassembler properties and settings
144  ***************************************************************************************************************************/
145 public:
150  virtual Unparser::BasePtr unparser() const = 0;
151 
155  ByteOrder::Endianness byteOrder() const { return p_byteOrder; }
156  void byteOrder(ByteOrder::Endianness sex) { p_byteOrder = sex; }
162  size_t wordSizeBytes() const { return p_wordSizeBytes; }
163  void wordSizeBytes(size_t nbytes) { p_wordSizeBytes = nbytes; }
169  size_t instructionAlignment() const;
170 
183  p_registers = rdict;
184  }
186  return p_registers;
187  }
188 
194  const CallingConvention::Dictionary& callingConventions() const { return callingConventions_; }
195  CallingConvention::Dictionary& callingConventions() { return callingConventions_; }
196  void callingConventions(const CallingConvention::Dictionary &d) { callingConventions_ = d; }
201  ASSERT_forbid(REG_IP.isEmpty());
202  return REG_IP;
203  }
204 
207  ASSERT_forbid(REG_SP.isEmpty());
208  return REG_SP;
209  }
210 
213  return REG_SF; // need not be valid
214  }
215 
219  return REG_SS; // need not be valid
220  }
221 
226  return REG_LINK; // need not be valid
227  }
228 
235  return p_proto_dispatcher;
236  }
237 
238  /***************************************************************************************************************************
239  * Instruction disassembly functions
240  ***************************************************************************************************************************/
241 public:
252  virtual SgAsmInstruction *disassembleOne(const MemoryMap::Ptr &map, rose_addr_t start_va, AddressSet *successors=NULL) = 0;
253 
260  SgAsmInstruction *disassembleOne(const unsigned char *buf, rose_addr_t buf_va, size_t buf_size, rose_addr_t start_va,
261  AddressSet *successors=NULL);
262 
263 
264  /***************************************************************************************************************************
265  * Miscellaneous methods
266  ***************************************************************************************************************************/
267 public:
272 
276  void mark_referenced_instructions(SgAsmInterpretation*, const MemoryMap::Ptr&, const InstructionMap&);
277 
283  AddressSet get_block_successors(const InstructionMap&, bool &complete/*out*/);
284 
290  static SgAsmInstruction *find_instruction_containing(const InstructionMap &insns, rose_addr_t va);
291 };
292 
293 } // namespace
294 } // namespace
295 } // namespace
296 
297 // Class versions must be at global scope
298 BOOST_CLASS_VERSION(Rose::BinaryAnalysis::Disassembler::Base, 2);
299 
300 #endif
301 #endif
size_t instructionAlignment() const
Property: Instruction alignment requirement.
virtual bool canDisassemble(SgAsmGenericHeader *) const =0
Predicate determining the suitability of a disassembler for a specific file header.
static SgAsmInstruction * find_instruction_containing(const InstructionMap &insns, rose_addr_t va)
Finds the highest-address instruction that contains the byte at the specified virtual address...
virtual RegisterDescriptor instructionPointerRegister() const
Returns the register that points to instructions.
virtual Unparser::BasePtr unparser() const =0
Unparser.
Base class for machine instructions.
void wordSizeBytes(size_t nbytes)
Property: Basic word size in bytes.
virtual Ptr clone() const =0
Creates a new copy of a disassembler.
RegisterDescriptor REG_LINK
Register descriptors initialized during construction.
RegisterDictionaryPtr p_registers
Description of registers available for this platform.
InstructionSemantics::BaseSemantics::DispatcherPtr p_proto_dispatcher
Prototypical dispatcher for creating real dispatchers.
void registerDictionary(const RegisterDictionaryPtr &rdict)
Properties: Register dictionary.
AddressSet get_block_successors(const InstructionMap &, bool &complete)
Calculates the successor addresses of a basic block and adds them to a successors set...
const CallingConvention::Dictionary & callingConventions() const
Property: Calling convention dictionary.
Main namespace for the ROSE library.
ByteOrder::Endianness byteOrder() const
Property: Byte order of instructions in memory.
void callingConventions(const CallingConvention::Dictionary &d)
Properties: Register dictionary.
boost::shared_ptr< Dispatcher > DispatcherPtr
Shared-ownership pointer to a semantics instruction dispatcher.
CallingConvention::Dictionary & callingConventions()
Properties: Register dictionary.
size_t instructionAlignment_
Positive alignment constraint for instruction addresses.
Base class for container file headers.
std::vector< Definition::Ptr > Dictionary
A ordered collection of calling convention definitions.
Describes (part of) a physical CPU register.
virtual RegisterDescriptor stackPointerRegister() const
Returns the register that points to the stack.
size_t p_wordSizeBytes
Basic word size in bytes.
virtual RegisterDescriptor stackFrameRegister() const
Returns the register that ponts to the stack frame.
size_t wordSizeBytes() const
Property: Basic word size in bytes.
ByteOrder::Endianness p_byteOrder
Byte order of instructions in memory.
virtual RegisterDescriptor stackSegmentRegister() const
Returns the segment register for accessing the stack.
void mark_referenced_instructions(SgAsmInterpretation *, const MemoryMap::Ptr &, const InstructionMap &)
Marks parts of the file that correspond to instructions as having been referenced.
Base class for reference counted objects.
Definition: SharedObject.h:64
void byteOrder(ByteOrder::Endianness sex)
Property: Byte order of instructions in memory.
virtual SgAsmInstruction * makeUnknownInstruction(const Exception &)=0
Makes an unknown instruction from an exception.
virtual RegisterDescriptor callReturnRegister() const
Returns the register that holds the return address for a function.
const std::string & name() const
Property: Name by which disassembler is registered.
const Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::DispatcherPtr & dispatcher() const
Return an instruction semantics dispatcher if possible.
std::string p_name
Name by which this dissassembler is registered.
Sawyer::SharedPointer< Base > BasePtr
Reference counted pointer for disassemblers.
virtual SgAsmInstruction * disassembleOne(const MemoryMap::Ptr &map, rose_addr_t start_va, AddressSet *successors=NULL)=0
This is the lowest level disassembly function and is implemented in the architecture-specific subclas...
bool isEmpty() const
Predicate returns true if the width is zero.
RegisterDictionaryPtr registerDictionary() const
Properties: Register dictionary.
Represents an interpretation of a binary container.
Map< rose_addr_t, SgAsmInstruction * > InstructionMap
The InstructionMap is a mapping from (absolute) virtual address to disassembled instruction.
Virtual base class for instruction disassemblers.
void name(const std::string &s)
Property: Name by which disassembler is registered.