ROSE 0.11.145.192
Public Types | Public Member Functions | Static Public Member Functions | Protected Member Functions | List of all members
Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators Class Reference

Description

Wraps RISC operators so they can be traced.

Definition at line 93 of file TraceSemantics.h.

#include <Rose/BinaryAnalysis/InstructionSemantics/TraceSemantics.h>

Inheritance diagram for Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators:
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Public Types

using Super = BaseSemantics::RiscOperators
 Base type.
 
using Ptr = RiscOperatorsPtr
 Shared-ownership pointer.
 
- Public Types inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators
enum class  IteStatus {
  NEITHER ,
  A ,
  B ,
  BOTH
}
 Status for iteWithStatus operation. More...
 
using Ptr = RiscOperatorsPtr
 Shared-ownership pointer.
 

Public Member Functions

virtual BaseSemantics::RiscOperatorsPtr create (const BaseSemantics::SValuePtr &protoval, const SmtSolverPtr &=SmtSolverPtr()) const override
 Virtual allocating constructor.
 
virtual BaseSemantics::RiscOperatorsPtr create (const BaseSemantics::StatePtr &state, const SmtSolverPtr &=SmtSolverPtr()) const override
 Virtual allocating constructor.
 
virtual BaseSemantics::RiscOperatorsPtr create (const BaseSemantics::RiscOperatorsPtr &subdomain)
 Wraps a subdomain's RISC operators to add tracing.
 
void checkSubdomain () const
 Check that we have a valid subdomain.
 
virtual BaseSemantics::SValuePtr protoval () const override
 Property: Prototypical semantic value.
 
virtual void solver (const SmtSolverPtr &) override
 Property: Satisfiability module theory (SMT) solver.
 
virtual SmtSolverPtr solver () const override
 Property: Satisfiability module theory (SMT) solver.
 
virtual BaseSemantics::StatePtr currentState () const override
 Property: Current semantic state.
 
virtual void currentState (const BaseSemantics::StatePtr &) override
 Property: Current semantic state.
 
virtual void print (std::ostream &, BaseSemantics::Formatter &) const override
 Print multi-line output for this object.
 
virtual size_t nInsns () const override
 Property: Number of instructions processed.
 
virtual void nInsns (size_t n) override
 Property: Number of instructions processed.
 
virtual SgAsmInstructioncurrentInstruction () const override
 Property: Current instruction.
 
virtual void currentInstruction (SgAsmInstruction *) override
 Property: Current instruction.
 
virtual bool isNoopRead () const override
 Property: No-op read.
 
virtual void isNoopRead (bool) override
 Property: No-op read.
 
virtual void startInstruction (SgAsmInstruction *) override
 Called at the beginning of every instruction.
 
virtual void finishInstruction (SgAsmInstruction *) override
 Called at the end of every instruction.
 
virtual void comment (const std::string &) override
 Inject a line comment into debugging streams.
 
virtual BaseSemantics::SValuePtr undefined_ (size_t nbits) override
 Returns a new undefined value.
 
virtual BaseSemantics::SValuePtr unspecified_ (size_t nbits) override
 Returns a new undefined value.
 
virtual BaseSemantics::SValuePtr number_ (size_t nbits, uint64_t value) override
 Returns a number of the specified bit width.
 
virtual BaseSemantics::SValuePtr boolean_ (bool value) override
 Returns a Boolean value.
 
virtual BaseSemantics::SValuePtr bottom_ (size_t nbits) override
 Returns a data-flow bottom value.
 
virtual BaseSemantics::SValuePtr filterCallTarget (const BaseSemantics::SValuePtr &) override
 Invoked to filter call targets.
 
virtual BaseSemantics::SValuePtr filterReturnTarget (const BaseSemantics::SValuePtr &) override
 Invoked to filter return targets.
 
virtual BaseSemantics::SValuePtr filterIndirectJumpTarget (const BaseSemantics::SValuePtr &) override
 Invoked to filter indirect jumps.
 
virtual void hlt () override
 Invoked for the x86 HLT instruction.
 
virtual void cpuid () override
 Invoked for the x86 CPUID instruction.
 
virtual BaseSemantics::SValuePtr rdtsc () override
 Invoked for the x86 RDTSC instruction.
 
virtual BaseSemantics::SValuePtr and_ (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &) override
 Computes bit-wise AND of two values.
 
virtual BaseSemantics::SValuePtr or_ (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &) override
 Computes bit-wise OR of two values.
 
virtual BaseSemantics::SValuePtr xor_ (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &) override
 Computes bit-wise XOR of two values.
 
virtual BaseSemantics::SValuePtr invert (const BaseSemantics::SValuePtr &) override
 One's complement.
 
virtual BaseSemantics::SValuePtr extract (const BaseSemantics::SValuePtr &, size_t begin_bit, size_t end_bit) override
 Extracts bits from a value.
 
virtual BaseSemantics::SValuePtr concat (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &) override
 Concatenates the bits of two values.
 
virtual BaseSemantics::SValuePtr leastSignificantSetBit (const BaseSemantics::SValuePtr &) override
 Returns position of least significant set bit; zero when no bits are set.
 
virtual BaseSemantics::SValuePtr mostSignificantSetBit (const BaseSemantics::SValuePtr &) override
 Returns position of most significant set bit; zero when no bits are set.
 
virtual BaseSemantics::SValuePtr rotateLeft (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &) override
 Rotate bits to the left.
 
virtual BaseSemantics::SValuePtr rotateRight (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &) override
 Rotate bits to the right.
 
virtual BaseSemantics::SValuePtr shiftLeft (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &) override
 Returns arg shifted left.
 
virtual BaseSemantics::SValuePtr shiftRight (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &) override
 Returns arg shifted right logically (no sign bit).
 
virtual BaseSemantics::SValuePtr shiftRightArithmetic (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &) override
 Returns arg shifted right arithmetically (with sign bit).
 
virtual BaseSemantics::SValuePtr equalToZero (const BaseSemantics::SValuePtr &) override
 Determines whether a value is equal to zero.
 
virtual BaseSemantics::SValuePtr iteWithStatus (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &, IteStatus &) override
 If-then-else with status.
 
virtual BaseSemantics::SValuePtr unsignedExtend (const BaseSemantics::SValuePtr &, size_t nbits) override
 Extend (or shrink) operand a so it is nbits wide by adding or removing high-order bits.
 
virtual BaseSemantics::SValuePtr signExtend (const BaseSemantics::SValuePtr &, size_t nbits) override
 Sign extends a value.
 
virtual BaseSemantics::SValuePtr add (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &) override
 Adds two integers of equal size.
 
virtual BaseSemantics::SValuePtr addWithCarries (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &, BaseSemantics::SValuePtr &) override
 Add two values of equal size and a carry bit.
 
virtual BaseSemantics::SValuePtr negate (const BaseSemantics::SValuePtr &) override
 Two's complement.
 
virtual BaseSemantics::SValuePtr signedDivide (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &) override
 Divides two signed values.
 
virtual BaseSemantics::SValuePtr signedModulo (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &) override
 Calculates modulo with signed values.
 
virtual BaseSemantics::SValuePtr signedMultiply (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &) override
 Multiplies two signed values.
 
virtual BaseSemantics::SValuePtr unsignedDivide (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &) override
 Divides two unsigned values.
 
virtual BaseSemantics::SValuePtr unsignedModulo (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &) override
 Calculates modulo with unsigned values.
 
virtual BaseSemantics::SValuePtr unsignedMultiply (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &) override
 Multiply two unsigned values.
 
virtual void interrupt (int majr, int minr) override
 Unconditionally raise an interrupt.
 
virtual BaseSemantics::SValuePtr fpFromInteger (const BaseSemantics::SValuePtr &, SgAsmFloatType *) override
 Construct a floating-point value from an integer value.
 
virtual BaseSemantics::SValuePtr fpToInteger (const BaseSemantics::SValuePtr &, SgAsmFloatType *, const BaseSemantics::SValuePtr &) override
 Construct an integer value from a floating-point value.
 
virtual BaseSemantics::SValuePtr fpConvert (const BaseSemantics::SValuePtr &, SgAsmFloatType *, SgAsmFloatType *) override
 Convert from one floating-point type to another.
 
virtual BaseSemantics::SValuePtr fpIsNan (const BaseSemantics::SValuePtr &, SgAsmFloatType *) override
 Whether a floating-point value is a special not-a-number bit pattern.
 
virtual BaseSemantics::SValuePtr fpIsDenormalized (const BaseSemantics::SValuePtr &, SgAsmFloatType *) override
 Whether a floating-point value is denormalized.
 
virtual BaseSemantics::SValuePtr fpIsZero (const BaseSemantics::SValuePtr &, SgAsmFloatType *) override
 Whether a floating-point value is equal to zero.
 
virtual BaseSemantics::SValuePtr fpIsInfinity (const BaseSemantics::SValuePtr &, SgAsmFloatType *) override
 Whether a floating-point value is infinity.
 
virtual BaseSemantics::SValuePtr fpSign (const BaseSemantics::SValuePtr &, SgAsmFloatType *) override
 Sign of floating-point value.
 
virtual BaseSemantics::SValuePtr fpEffectiveExponent (const BaseSemantics::SValuePtr &, SgAsmFloatType *) override
 Exponent of floating-point value.
 
virtual BaseSemantics::SValuePtr fpAdd (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &, SgAsmFloatType *) override
 Add two floating-point values.
 
virtual BaseSemantics::SValuePtr fpSubtract (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &, SgAsmFloatType *) override
 Subtract one floating-point value from another.
 
virtual BaseSemantics::SValuePtr fpMultiply (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &, SgAsmFloatType *) override
 Multiply two floating-point values.
 
virtual BaseSemantics::SValuePtr fpDivide (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &, SgAsmFloatType *) override
 Divide one floating-point value by another.
 
virtual BaseSemantics::SValuePtr fpSquareRoot (const BaseSemantics::SValuePtr &, SgAsmFloatType *) override
 Square root.
 
virtual BaseSemantics::SValuePtr fpRoundTowardZero (const BaseSemantics::SValuePtr &, SgAsmFloatType *) override
 Round toward zero.
 
virtual BaseSemantics::SValuePtr readRegister (RegisterDescriptor, const BaseSemantics::SValuePtr &dflt) override
 Reads a value from a register.
 
virtual BaseSemantics::SValuePtr peekRegister (RegisterDescriptor, const BaseSemantics::SValuePtr &dflt) override
 Obtain a register value without side effects.
 
virtual void writeRegister (RegisterDescriptor, const BaseSemantics::SValuePtr &) override
 Writes a value to a register.
 
virtual BaseSemantics::SValuePtr readMemory (RegisterDescriptor segreg, const BaseSemantics::SValuePtr &addr, const BaseSemantics::SValuePtr &dflt, const BaseSemantics::SValuePtr &cond) override
 Reads a value from memory.
 
virtual BaseSemantics::SValuePtr peekMemory (RegisterDescriptor segreg, const BaseSemantics::SValuePtr &addr, const BaseSemantics::SValuePtr &dflt) override
 Read memory without side effects.
 
virtual void writeMemory (RegisterDescriptor segreg, const BaseSemantics::SValuePtr &addr, const BaseSemantics::SValuePtr &data, const BaseSemantics::SValuePtr &cond) override
 Writes a value to memory.
 
const BaseSemantics::RiscOperatorsPtrsubdomain () const
 Property: Subdomain to which operations are forwarded.
 
void subdomain (const BaseSemantics::RiscOperatorsPtr &subdomain)
 Property: Subdomain to which operations are forwarded.
 
Sawyer::Message::Streamstream ()
 Property: output stream to which tracing is emitted.
 
void stream (Sawyer::Message::Stream &)
 Property: output stream to which tracing is emitted.
 
const std::string & indentation () const
 Property: Line prefix string.
 
void indentation (const std::string &)
 Property: Line prefix string.
 
bool showingSubdomain () const
 Property: Show subdomain name in output.
 
void showingSubdomain (bool)
 Property: Show subdomain name in output.
 
bool showingInstructionVa () const
 Property: Show instruction in output.
 
void showingInstructionVa (bool)
 Property: Show instruction in output.
 
bool onlyInstructions () const
 Property: Show only operations for instructions.
 
void onlyInstructions (bool)
 Property: Show only operations for instructions.
 
- Public Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators
virtual void hash (Combinatorics::Hasher &)
 Compute hash of current state.
 
virtual std::pair< SValuePtr, SValuePtrsplit (const SValuePtr &a, size_t splitPoint)
 Split a value into two narrower values.
 
virtual SValuePtr countLeadingZeros (const SValuePtr &a)
 Count leading zero bits.
 
virtual SValuePtr countLeadingOnes (const SValuePtr &a)
 Count leading one bits.
 
virtual SValuePtr reverseElmts (const SValuePtr &a, size_t elmtNBits)
 Reverse parts of a value.
 
virtual SValuePtr ite (const SValuePtr &cond, const SValuePtr &a, const SValuePtr &b) final
 If-then-else.
 
virtual SValuePtr addCarry (const SValuePtr &a, const SValuePtr &b, SValuePtr &carryOut, SValuePtr &overflowed)
 Adds two integers of equal size and carry.
 
virtual SValuePtr subtract (const SValuePtr &minuend, const SValuePtr &subtrahend)
 Subtract one value from another.
 
virtual SValuePtr subtractCarry (const SValuePtr &minuend, const SValuePtr &subtrahend, SValuePtr &carryOut, SValuePtr &overflowed)
 Subtract one value from another and carry.
 
virtual void interrupt (const SValuePtr &majr, const SValuePtr &minr, const SValuePtr &raise)
 Invoked for instructions that cause an interrupt.
 
virtual void raiseInterrupt (unsigned majorNumber, unsigned minorNumber, const SValuePtr &raise)
 Conditionally raise an interrupt.
 
virtual SValuePtr reinterpret (const SValuePtr &a, SgAsmType *retType)
 Reinterpret an expression as a different type.
 
virtual SValuePtr convert (const SValuePtr &a, SgAsmType *srcType, SgAsmType *dstType)
 Convert value from one type to another.
 
const HotPatchhotPatch () const
 Property: Post-instruction hot patches.
 
HotPatchhotPatch ()
 Property: Post-instruction hot patches.
 
void hotPatch (const HotPatch &hp)
 Property: Post-instruction hot patches.
 
virtual StatePtr initialState () const
 Property: Optional lazily updated initial state.
 
virtual void initialState (const StatePtr &s)
 Property: Optional lazily updated initial state.
 
virtual const std::string & name () const
 Property: Name used for debugging.
 
virtual void name (const std::string &s)
 Property: Name used for debugging.
 
void print (std::ostream &stream, const std::string prefix="") const
 Print multi-line output for this object.
 
WithFormatter with_format (Formatter &fmt)
 Used for printing RISC operators with formatting.
 
WithFormatter operator+ (Formatter &fmt)
 Used for printing RISC operators with formatting.
 
WithFormatter operator+ (const std::string &linePrefix)
 Used for printing RISC operators with formatting.
 
virtual SValuePtr concatLoHi (const SValuePtr &lowBits, const SValuePtr &highBits)
 Aliases for concatenation.
 
virtual SValuePtr concatHiLo (const SValuePtr &highBits, const SValuePtr &lowBits)
 Aliases for concatenation.
 
virtual SValuePtr isEqual (const SValuePtr &a, const SValuePtr &b)
 Equality comparison.
 
virtual SValuePtr isNotEqual (const SValuePtr &a, const SValuePtr &b)
 Equality comparison.
 
virtual SValuePtr isUnsignedLessThan (const SValuePtr &a, const SValuePtr &b)
 Comparison for unsigned values.
 
virtual SValuePtr isUnsignedLessThanOrEqual (const SValuePtr &a, const SValuePtr &b)
 Comparison for unsigned values.
 
virtual SValuePtr isUnsignedGreaterThan (const SValuePtr &a, const SValuePtr &b)
 Comparison for unsigned values.
 
virtual SValuePtr isUnsignedGreaterThanOrEqual (const SValuePtr &a, const SValuePtr &b)
 Comparison for unsigned values.
 
virtual SValuePtr isSignedLessThan (const SValuePtr &a, const SValuePtr &b)
 Comparison for signed values.
 
virtual SValuePtr isSignedLessThanOrEqual (const SValuePtr &a, const SValuePtr &b)
 Comparison for signed values.
 
virtual SValuePtr isSignedGreaterThan (const SValuePtr &a, const SValuePtr &b)
 Comparison for signed values.
 
virtual SValuePtr isSignedGreaterThanOrEqual (const SValuePtr &a, const SValuePtr &b)
 Comparison for signed values.
 
virtual SValuePtr readRegister (RegisterDescriptor reg)
 Reads a value from a register.
 
SValuePtr peekRegister (RegisterDescriptor reg)
 Obtain a register value without side effects.
 

Static Public Member Functions

static RiscOperatorsPtr instance (const BaseSemantics::SValuePtr &protoval, const SmtSolverPtr &=SmtSolverPtr())
 Instantiates a new RiscOperators object.
 
static RiscOperatorsPtr instance (const BaseSemantics::StatePtr &, const SmtSolverPtr &=SmtSolverPtr())
 Instantiates a new RiscOperators object.
 
static RiscOperatorsPtr instance (const BaseSemantics::RiscOperatorsPtr &subdomain)
 Instantiate a new RiscOperators object.
 
static RiscOperatorsPtr promote (const BaseSemantics::RiscOperatorsPtr &)
 Run-time promotion of a base RiscOperators pointer to trace operators.
 
- Static Public Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators
static RiscOperatorsPtr promote (const RiscOperatorsPtr &x)
 

Protected Member Functions

 RiscOperators (const BaseSemantics::SValuePtr &protoval, const SmtSolverPtr &solver=SmtSolverPtr())
 
 RiscOperators (const BaseSemantics::StatePtr &state, const SmtSolverPtr &solver=SmtSolverPtr())
 
 RiscOperators (const BaseSemantics::RiscOperatorsPtr &subdomain)
 
void linePrefix ()
 
std::string toString (const BaseSemantics::SValuePtr &)
 
std::string toString (SgAsmFloatType *)
 
void check_equal_widths (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &)
 
const BaseSemantics::SValuePtrcheck_width (const BaseSemantics::SValuePtr &a, size_t nbits, const std::string &what="result")
 
std::string register_name (RegisterDescriptor)
 
bool shouldPrint () const
 
bool shouldPrint (SgAsmInstruction *) const
 
void before (const std::string &)
 
void before (const std::string &, RegisterDescriptor)
 
void before (const std::string &, RegisterDescriptor, const BaseSemantics::SValuePtr &)
 
void before (const std::string &, RegisterDescriptor, const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &)
 
void before (const std::string &, RegisterDescriptor, const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &, size_t)
 
void before (const std::string &, RegisterDescriptor, const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &)
 
void before (const std::string &, SgAsmInstruction *, bool showAddress)
 
void before (const std::string &, size_t)
 
void before (const std::string &, size_t, uint64_t)
 
void before (const std::string &, const BaseSemantics::SValuePtr &)
 
void before (const std::string &, const BaseSemantics::SValuePtr &, size_t)
 
void before (const std::string &, const BaseSemantics::SValuePtr &, size_t, size_t)
 
void before (const std::string &, const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &)
 
void before (const std::string &, const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &)
 
void before (const std::string &, const BaseSemantics::SValuePtr &, SgAsmFloatType *)
 
void before (const std::string &, const BaseSemantics::SValuePtr &, SgAsmFloatType *, const BaseSemantics::SValuePtr &)
 
void before (const std::string &, const BaseSemantics::SValuePtr &, SgAsmFloatType *, SgAsmFloatType *)
 
void before (const std::string &, const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &, SgAsmFloatType *)
 
void after ()
 
void after (SgAsmInstruction *)
 
const BaseSemantics::SValuePtrafter (const BaseSemantics::SValuePtr &)
 
const BaseSemantics::SValuePtrafter (const BaseSemantics::SValuePtr &, const BaseSemantics::SValuePtr &)
 
const BaseSemantics::SValuePtrafter (const BaseSemantics::SValuePtr &, IteStatus)
 
void after (const BaseSemantics::Exception &)
 
void after (const BaseSemantics::Exception &, SgAsmInstruction *)
 
void after_exception ()
 
void after_exception (SgAsmInstruction *)
 
- Protected Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators
 RiscOperators (const SValuePtr &protoval, const SmtSolverPtr &solver=SmtSolverPtr())
 
 RiscOperators (const StatePtr &state, const SmtSolverPtr &solver=SmtSolverPtr())
 

Member Typedef Documentation

◆ Super

Base type.

Definition at line 96 of file TraceSemantics.h.

◆ Ptr

Shared-ownership pointer.

Definition at line 99 of file TraceSemantics.h.

Constructor & Destructor Documentation

◆ ~RiscOperators()

virtual Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::~RiscOperators ( )
virtual

Member Function Documentation

◆ instance() [1/3]

static RiscOperatorsPtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::instance ( const BaseSemantics::SValuePtr protoval,
const SmtSolverPtr = SmtSolverPtr() 
)
static

Instantiates a new RiscOperators object.

This domain does not create any of its own values–it only wraps another domains RISC operators. Therefore, the supplied protoval and solver are not actually used. It is probably better to construct the TraceSemantics' RISC operators with the constructor that takes the subdomain's RISC operators.

◆ instance() [2/3]

static RiscOperatorsPtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::instance ( const BaseSemantics::StatePtr ,
const SmtSolverPtr = SmtSolverPtr() 
)
static

Instantiates a new RiscOperators object.

This domain does not manage any state–it only wraps another domains RISC operators. Therefore, the supplied protoval and solver are not actually used. It is probably better to construct the TraceSemantics' RISC operators with the constructor that takes the subdomain's RISC operators.

◆ instance() [3/3]

static RiscOperatorsPtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::instance ( const BaseSemantics::RiscOperatorsPtr subdomain)
static

Instantiate a new RiscOperators object.

The subdomain argument should be the RISC operators that we want to trace.

◆ create() [1/2]

virtual BaseSemantics::RiscOperatorsPtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::create ( const BaseSemantics::SValuePtr protoval,
const SmtSolverPtr solver = SmtSolverPtr() 
) const
overridevirtual

Virtual allocating constructor.

The protoval is a prototypical semantic value that is used as a factory to create additional values as necessary via its virtual constructors. The state upon which the RISC operations operate must be set by modifying the currentState property. An optional SMT solver may be specified (see solver).

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ create() [2/2]

virtual BaseSemantics::RiscOperatorsPtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::create ( const BaseSemantics::StatePtr state,
const SmtSolverPtr solver = SmtSolverPtr() 
) const
overridevirtual

Virtual allocating constructor.

The supplied state is that upon which the RISC operations operate and is also used to define the prototypical semantic value. Other states can be supplied by setting currentState. The prototypical semantic value is used as a factory to create additional values as necessary via its virtual constructors. An optional SMT solver may be specified (see solver).

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ promote()

static RiscOperatorsPtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::promote ( const BaseSemantics::RiscOperatorsPtr )
static

Run-time promotion of a base RiscOperators pointer to trace operators.

This is a checked conversion–it will fail if from does not point to a TraceSemantics::RiscOperators object.

◆ checkSubdomain()

void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::checkSubdomain ( ) const

Check that we have a valid subdomain.

If the subdomain isn't value (hasn't been set) then throw an exception.

◆ stream() [1/2]

Sawyer::Message::Stream & Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::stream ( )

Property: output stream to which tracing is emitted.

The default is the INFO stream of the Rose::BinaryAnalysis::InstructionSemantics message facility. Output will only show up when this stream is enabled.

◆ stream() [2/2]

void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::stream ( Sawyer::Message::Stream )

Property: output stream to which tracing is emitted.

The default is the INFO stream of the Rose::BinaryAnalysis::InstructionSemantics message facility. Output will only show up when this stream is enabled.

◆ indentation() [1/2]

const std::string & Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::indentation ( ) const

Property: Line prefix string.

This string will be printed at the start of each line of output. It's usually used for indentation.

◆ indentation() [2/2]

void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::indentation ( const std::string &  )

Property: Line prefix string.

This string will be printed at the start of each line of output. It's usually used for indentation.

◆ showingSubdomain() [1/2]

bool Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::showingSubdomain ( ) const

Property: Show subdomain name in output.

If true, then the subdomain name and object address is printed for each line of output.

◆ showingSubdomain() [2/2]

void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::showingSubdomain ( bool  )

Property: Show subdomain name in output.

If true, then the subdomain name and object address is printed for each line of output.

◆ showingInstructionVa() [1/2]

bool Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::showingInstructionVa ( ) const

Property: Show instruction in output.

If true, then each line of output will contain the instruction virtual address.

◆ showingInstructionVa() [2/2]

void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::showingInstructionVa ( bool  )

Property: Show instruction in output.

If true, then each line of output will contain the instruction virtual address.

◆ onlyInstructions() [1/2]

bool Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::onlyInstructions ( ) const

Property: Show only operations for instructions.

Operators are usually called to interpret an instruction, but they can also be called directly by analysis, such as when an analysis needs to read a register from a semantic state. If the onlyInstructions property is set, then the output will show only operations that are associated with an instruction and will suppress operations that are invoked without a current instruction.

◆ onlyInstructions() [2/2]

void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::onlyInstructions ( bool  )

Property: Show only operations for instructions.

Operators are usually called to interpret an instruction, but they can also be called directly by analysis, such as when an analysis needs to read a register from a semantic state. If the onlyInstructions property is set, then the output will show only operations that are associated with an instruction and will suppress operations that are invoked without a current instruction.

◆ protoval()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::protoval ( ) const
overridevirtual

Property: Prototypical semantic value.

The protoval is used to construct other values via its virtual constructors.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ solver() [1/2]

virtual void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::solver ( const SmtSolverPtr s)
overridevirtual

Property: Satisfiability module theory (SMT) solver.

This property holds a pointer to the satisfiability modulo theory (SMT) solver to use for certain operations. An SMT solver is optional and not all semantic domains will make use of a solver. Domains that use a solver will fall back to naive implementations when a solver is not available (for instance, equality of two values might be checked by looking at whether the values are identical).

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ solver() [2/2]

virtual SmtSolverPtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::solver ( ) const
overridevirtual

Property: Satisfiability module theory (SMT) solver.

This property holds a pointer to the satisfiability modulo theory (SMT) solver to use for certain operations. An SMT solver is optional and not all semantic domains will make use of a solver. Domains that use a solver will fall back to naive implementations when a solver is not available (for instance, equality of two values might be checked by looking at whether the values are identical).

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ currentState() [1/2]

virtual BaseSemantics::StatePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::currentState ( ) const
overridevirtual

Property: Current semantic state.

This is the state upon which the RISC operations operate. The state need not be set until the first instruction is executed (and even then, some RISC operations don't need any machine state; typically, only register and memory read and write operators need state). Different state objects can be swapped in at pretty much any time. Modifying the state has no effect on this object's prototypical value which was initialized by the constructor; new states should have a prototyipcal value of the same dynamic type.

See also, initialState.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ currentState() [2/2]

virtual void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::currentState ( const BaseSemantics::StatePtr s)
overridevirtual

Property: Current semantic state.

This is the state upon which the RISC operations operate. The state need not be set until the first instruction is executed (and even then, some RISC operations don't need any machine state; typically, only register and memory read and write operators need state). Different state objects can be swapped in at pretty much any time. Modifying the state has no effect on this object's prototypical value which was initialized by the constructor; new states should have a prototyipcal value of the same dynamic type.

See also, initialState.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ print()

virtual void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::print ( std::ostream &  stream,
BaseSemantics::Formatter fmt 
) const
overridevirtual

Print multi-line output for this object.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ nInsns() [1/2]

virtual size_t Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::nInsns ( ) const
overridevirtual

Property: Number of instructions processed.

This counter is incremented at the beginning of each instruction.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ nInsns() [2/2]

virtual void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::nInsns ( size_t  n)
overridevirtual

Property: Number of instructions processed.

This counter is incremented at the beginning of each instruction.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ currentInstruction() [1/2]

virtual SgAsmInstruction * Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::currentInstruction ( ) const
overridevirtual

Property: Current instruction.

Returns the instruction which is being processed. This is set by startInstruction and cleared by finishInstruction. Returns null if we are not processing an instruction.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ currentInstruction() [2/2]

virtual void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::currentInstruction ( SgAsmInstruction insn)
overridevirtual

Property: Current instruction.

Returns the instruction which is being processed. This is set by startInstruction and cleared by finishInstruction. Returns null if we are not processing an instruction.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ isNoopRead() [1/2]

virtual bool Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::isNoopRead ( ) const
overridevirtual

Property: No-op read.

This property can be set to indicate that the next read operation(s) are part of a possible read-then-write no-op sequence. This property is normally reset at the beginning and end of each instruction by startInstruction and finishInstruction.

For example, most ARM AArch32 A32 instructions are conditionally executed. Therefore any instruction that writes to memory will either write a newly calculated value, or will write the original value. When expressed symbolically, the expression is something like (writeMemory ADDRESS (ite CONDITION VALUE (readMemory ADDRESS))). In this case, the readMemory is part of a read-then-write sequence that has no effect, and this no-op read property can be set in order to express this intent to any analysis that might be triggered by memory reads.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ isNoopRead() [2/2]

virtual void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::isNoopRead ( bool  b)
overridevirtual

Property: No-op read.

This property can be set to indicate that the next read operation(s) are part of a possible read-then-write no-op sequence. This property is normally reset at the beginning and end of each instruction by startInstruction and finishInstruction.

For example, most ARM AArch32 A32 instructions are conditionally executed. Therefore any instruction that writes to memory will either write a newly calculated value, or will write the original value. When expressed symbolically, the expression is something like (writeMemory ADDRESS (ite CONDITION VALUE (readMemory ADDRESS))). In this case, the readMemory is part of a read-then-write sequence that has no effect, and this no-op read property can be set in order to express this intent to any analysis that might be triggered by memory reads.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ startInstruction()

virtual void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::startInstruction ( SgAsmInstruction insn)
overridevirtual

Called at the beginning of every instruction.

This method is invoked every time the translation object begins processing an instruction. Some policies use this to update a pointer to the current instruction.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ finishInstruction()

virtual void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::finishInstruction ( SgAsmInstruction insn)
overridevirtual

Called at the end of every instruction.

This method is invoked whenever the translation object ends processing for an instruction. This is not called if there's an exception during processing.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ comment()

virtual void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::comment ( const std::string &  )
overridevirtual

Inject a line comment into debugging streams.

If this operators object supports it, the specified string will appear in the debugging output as a comment.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ undefined_()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::undefined_ ( size_t  nbits)
overridevirtual

Returns a new undefined value.

Uses the prototypical value to virtually construct the new value.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ unspecified_()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::unspecified_ ( size_t  nbits)
overridevirtual

Returns a new undefined value.

Uses the prototypical value to virtually construct the new value.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ number_()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::number_ ( size_t  nbits,
uint64_t  value 
)
overridevirtual

Returns a number of the specified bit width.

Uses the prototypical value to virtually construct a new value.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ boolean_()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::boolean_ ( bool  value)
overridevirtual

Returns a Boolean value.

Uses the prototypical value to virtually construct a new value.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ bottom_()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::bottom_ ( size_t  nbits)
overridevirtual

Returns a data-flow bottom value.

Uses the prototypical value to virtually construct a new value.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ filterCallTarget()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::filterCallTarget ( const BaseSemantics::SValuePtr a)
overridevirtual

Invoked to filter call targets.

This method is called whenever the translation object is about to invoke a function call. The target address is passed as an argument and a (new) target should be returned.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ filterReturnTarget()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::filterReturnTarget ( const BaseSemantics::SValuePtr a)
overridevirtual

Invoked to filter return targets.

This method is called whenever the translation object is about to return from a function call (such as for the x86 "RET" instruction). The return address is passed as an argument and a (new) return address should be returned.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ filterIndirectJumpTarget()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::filterIndirectJumpTarget ( const BaseSemantics::SValuePtr a)
overridevirtual

Invoked to filter indirect jumps.

This method is called whenever the translation object is about to unconditionally jump to a new address (such as for the x86 "JMP" instruction). The target address is passed as an argument and a (new) target address should be returned.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ hlt()

virtual void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::hlt ( )
overridevirtual

Invoked for the x86 HLT instruction.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ cpuid()

virtual void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::cpuid ( )
overridevirtual

Invoked for the x86 CPUID instruction.

FIXME: x86-specific stuff should be in the dispatcher.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ rdtsc()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::rdtsc ( )
overridevirtual

Invoked for the x86 RDTSC instruction.

FIXME: x86-specific stuff should be in the dispatcher.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ and_()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::and_ ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr b 
)
overridevirtual

Computes bit-wise AND of two values.

The operands must both have the same width; the result must be the same width as the operands.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ or_()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::or_ ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr b 
)
overridevirtual

Computes bit-wise OR of two values.

The operands a and b must have the same width; the return value width will be the same as a and b.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ xor_()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::xor_ ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr b 
)
overridevirtual

Computes bit-wise XOR of two values.

The operands a and b must have the same width; the result will be the same width as a and b.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ invert()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::invert ( const BaseSemantics::SValuePtr a)
overridevirtual

One's complement.

The result will be the same size as the operand.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ extract()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::extract ( const BaseSemantics::SValuePtr a,
size_t  begin_bit,
size_t  end_bit 
)
overridevirtual

Extracts bits from a value.

The specified bits from begin_bit (inclusive) through end_bit (exclusive) are copied into the low-order bits of the return value (other bits in the return value are cleared). The least significant bit is number zero. The begin_bit and end_bit values must be valid for the width of a.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ concat()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::concat ( const BaseSemantics::SValuePtr lowBits,
const BaseSemantics::SValuePtr highBits 
)
overridevirtual

Concatenates the bits of two values.

The bits of lowBits and highBits are concatenated so that the result has lowBits in the low-order bits and highBits in the high order bits. The width of the return value is the sum of the widths of lowBits and highBits.

Note that the order of arguments for this method is the reverse of the SymbolicExpression concatenation function.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ leastSignificantSetBit()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::leastSignificantSetBit ( const BaseSemantics::SValuePtr a)
overridevirtual

Returns position of least significant set bit; zero when no bits are set.

The return value will have the same width as the operand, although this can be safely truncated to the log-base-2 + 1 width.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ mostSignificantSetBit()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::mostSignificantSetBit ( const BaseSemantics::SValuePtr a)
overridevirtual

Returns position of most significant set bit; zero when no bits are set.

The return value will have the same width as the operand, although this can be safely truncated to the log-base-2 + 1 width.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ rotateLeft()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::rotateLeft ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr nbits 
)
overridevirtual

Rotate bits to the left.

The return value will have the same width as operand a. The nbits is interpreted as unsigned. The behavior is modulo the width of a regardless of whether the implementation makes that a special case or handles it naturally.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ rotateRight()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::rotateRight ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr nbits 
)
overridevirtual

Rotate bits to the right.

The return value will have the same width as operand a. The nbits is interpreted as unsigned. The behavior is modulo the width of a regardless of whether the implementation makes that a special case or handles it naturally.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ shiftLeft()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::shiftLeft ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr nbits 
)
overridevirtual

Returns arg shifted left.

The return value will have the same width as operand a. The nbits is interpreted as unsigned. New bits shifted into the value are zero. If nbits is equal to or larger than the width of a then the result is zero.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ shiftRight()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::shiftRight ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr nbits 
)
overridevirtual

Returns arg shifted right logically (no sign bit).

The return value will have the same width as operand a. The nbits is interpreted as unsigned. New bits shifted into the value are zero. If nbits is equal to or larger than the width of a then the result is zero.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ shiftRightArithmetic()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::shiftRightArithmetic ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr nbits 
)
overridevirtual

Returns arg shifted right arithmetically (with sign bit).

The return value will have the same width as operand a. The nbits is interpreted as unsigned. New bits shifted into the value are the same as the most significant bit (the "sign bit"). If nbits is equal to or larger than the width of a then the result has all bits cleared or all bits set depending on whether the most significant bit was originally clear or set.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ equalToZero()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::equalToZero ( const BaseSemantics::SValuePtr a)
overridevirtual

Determines whether a value is equal to zero.

Returns true, false, or undefined (in the semantic domain) depending on whether argument is zero.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ iteWithStatus()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::iteWithStatus ( const BaseSemantics::SValuePtr cond,
const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr b,
IteStatus status 
)
overridevirtual

If-then-else with status.

Returns operand a if cond is true, operand b if cond is false, or some other value if the condition is unknown. The condition must be one bit wide; the widths of a and b must be equal; the return value width will be the same as a and b.

The status is an output that indicates how the main return value was determined.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ unsignedExtend()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::unsignedExtend ( const BaseSemantics::SValuePtr a,
size_t  new_width 
)
overridevirtual

Extend (or shrink) operand a so it is nbits wide by adding or removing high-order bits.

Added bits are always zeros. The result will be the specified new_width.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ signExtend()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::signExtend ( const BaseSemantics::SValuePtr a,
size_t  new_width 
)
overridevirtual

Sign extends a value.

The result will be the specified new_width, which must be at least as large as the original width.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ add()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::add ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr b 
)
overridevirtual

Adds two integers of equal size.

The width of a and b must be equal; the return value will have the same width as a and b.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ addWithCarries()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::addWithCarries ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr b,
const BaseSemantics::SValuePtr c,
BaseSemantics::SValuePtr carry_out 
)
overridevirtual

Add two values of equal size and a carry bit.

Carry information is returned via carry_out argument. The carry_out value is the tick marks that are written above the first addend when doing long arithmetic like a 2nd grader would do (of course, they'd probably be adding two base-10 numbers). For instance, when adding 00110110 and 11100100:

'''..'.. <-- carry tick marks: '=carry .=no carry
00110110
+ 11100100
----------
100011010

The carry_out value is 11100100.

The width of a and b must be equal; c must have a width of one bit; the return value and carry_out will be the same width as a and b. The carry_out value is allocated herein.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ negate()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::negate ( const BaseSemantics::SValuePtr a)
overridevirtual

Two's complement.

The return value will have the same width as the operand.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ signedDivide()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::signedDivide ( const BaseSemantics::SValuePtr dividend,
const BaseSemantics::SValuePtr divisor 
)
overridevirtual

Divides two signed values.

The width of the result will be the same as the width of the dividend.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ signedModulo()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::signedModulo ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr b 
)
overridevirtual

Calculates modulo with signed values.

The width of the result will be the same as the width of operand b.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ signedMultiply()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::signedMultiply ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr b 
)
overridevirtual

Multiplies two signed values.

The width of the result will be the sum of the widths of a and b.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ unsignedDivide()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::unsignedDivide ( const BaseSemantics::SValuePtr dividend,
const BaseSemantics::SValuePtr divisor 
)
overridevirtual

Divides two unsigned values.

The width of the result is the same as the width of the dividend.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ unsignedModulo()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::unsignedModulo ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr b 
)
overridevirtual

Calculates modulo with unsigned values.

The width of the result is the same as the width of operand b.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ unsignedMultiply()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::unsignedMultiply ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr b 
)
overridevirtual

Multiply two unsigned values.

The width of the result is the sum of the widths of a and b.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ interrupt()

virtual void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::interrupt ( int  majorNumber,
int  minorNumber 
)
overridevirtual

Unconditionally raise an interrupt.

The major and minor numbers are architecture specific. For instance, an x86 INT instruction uses major number zero and the minor number is the interrupt number (e.g., 0x80 for Linux system calls), while an x86 SYSENTER instruction uses major number one.

The base implementation does one of two things. If the current state has an interrupt sub-state then the specified interrupt is raised in that state by setting that interrupt to true. Otherwise, the base implementation does nothing.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ fpFromInteger()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::fpFromInteger ( const BaseSemantics::SValuePtr intValue,
SgAsmFloatType fpType 
)
overridevirtual

Construct a floating-point value from an integer value.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ fpToInteger()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::fpToInteger ( const BaseSemantics::SValuePtr fpValue,
SgAsmFloatType fpType,
const BaseSemantics::SValuePtr dflt 
)
overridevirtual

Construct an integer value from a floating-point value.

The bits of fpValue are interpreted according to the fpType and converted to a signed integer value that fits in integerWidth bits. This is done by truncating the fractional part of the floating point number, thus rounding toward zero. If fpValue is not a number then dflt is returned.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ fpConvert()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::fpConvert ( const BaseSemantics::SValuePtr a,
SgAsmFloatType aType,
SgAsmFloatType retType 
)
overridevirtual

Convert from one floating-point type to another.

Converts the floating-point value a having type aType to the return value having retType.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ fpIsNan()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::fpIsNan ( const BaseSemantics::SValuePtr fpValue,
SgAsmFloatType fpType 
)
overridevirtual

Whether a floating-point value is a special not-a-number bit pattern.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ fpIsDenormalized()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::fpIsDenormalized ( const BaseSemantics::SValuePtr fpValue,
SgAsmFloatType fpType 
)
overridevirtual

Whether a floating-point value is denormalized.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ fpIsZero()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::fpIsZero ( const BaseSemantics::SValuePtr fpValue,
SgAsmFloatType fpType 
)
overridevirtual

Whether a floating-point value is equal to zero.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ fpIsInfinity()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::fpIsInfinity ( const BaseSemantics::SValuePtr fpValue,
SgAsmFloatType fpType 
)
overridevirtual

Whether a floating-point value is infinity.

Returns true if the floating point value is plus or minus infinity. Querying the sign bit will return the sign of the infinity.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ fpSign()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::fpSign ( const BaseSemantics::SValuePtr fpValue,
SgAsmFloatType fpType 
)
overridevirtual

Sign of floating-point value.

Returns the value of the floating-point sign bit.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ fpEffectiveExponent()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::fpEffectiveExponent ( const BaseSemantics::SValuePtr fpValue,
SgAsmFloatType fpType 
)
overridevirtual

Exponent of floating-point value.

Returns the exponent of the floating point value. For normalized values this returns the stored exponent minus the exponent bias. For denormalized numbers this returns the stored exponent minus the exponent bias minus an additional amount to normalize the significand.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ fpAdd()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::fpAdd ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr b,
SgAsmFloatType fpType 
)
overridevirtual

Add two floating-point values.

Adds two floating-point values that have the same type and returns the sum in the same type.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ fpSubtract()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::fpSubtract ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr b,
SgAsmFloatType fpType 
)
overridevirtual

Subtract one floating-point value from another.

Subtracts b from a and returns the difference. All three floating-point values have the same type. The default implementation is in terms of negate and add.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ fpMultiply()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::fpMultiply ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr b,
SgAsmFloatType fpType 
)
overridevirtual

Multiply two floating-point values.

Multiplies two floating-point values and returns the product. All three values have the same type.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ fpDivide()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::fpDivide ( const BaseSemantics::SValuePtr a,
const BaseSemantics::SValuePtr b,
SgAsmFloatType fpType 
)
overridevirtual

Divide one floating-point value by another.

Computes a divided by b and returns the result. All three floating-point values have the same type.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ fpSquareRoot()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::fpSquareRoot ( const BaseSemantics::SValuePtr a,
SgAsmFloatType fpType 
)
overridevirtual

Square root.

Computes and returns the square root of the specified floating-point value. Both values have the same type.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ fpRoundTowardZero()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::fpRoundTowardZero ( const BaseSemantics::SValuePtr a,
SgAsmFloatType fpType 
)
overridevirtual

Round toward zero.

Truncate the fractional part of the floating point number.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ readRegister()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::readRegister ( RegisterDescriptor  reg,
const BaseSemantics::SValuePtr dflt 
)
overridevirtual

Reads a value from a register.

The base implementation simply delegates to the current semantic State, which probably delegates to a register state, but subclasses are welcome to override this behavior at any level.

A register state will typically implement storage for hardware registers, but higher layers (the State, RiscOperators, Dispatcher, ...) should not be concerned about the size of the register they're trying to read. For example, a register state for a 32-bit x86 architecture will likely have a storage location for the 32-bit EAX register, but it should be possible to ask readRegister to return the value of AX (the low-order 16-bits). In order to accomplish this, some level of the readRegister delegations needs to invoke extract to obtain the low 16 bits. The RiscOperators object is passed along the delegation path for this purpose. The inverse concat operation will be needed at some level when we ask readRegister to return a value that comes from multiple storage locations in the register state (such as can happen if an x86 register state holds individual status flags and we ask for the 32-bit EFLAGS register).

If the register state can distinguish between a register that has never been accessed and a register that has only been read, then the dflt value is stored into the register the first time it's read. This ensures that reading the register a second time with no intervening write will return the same value as the first read. If a dflt is not provided then one is constructed by invoking undefined_.

There needs to be a certain level of cooperation between the RiscOperators, State, and register state classes to decide which layer should invoke the extract or concat (or whatever other RISC operations might be necessary).

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ peekRegister()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::peekRegister ( RegisterDescriptor  ,
const BaseSemantics::SValuePtr dflt 
)
overridevirtual

Obtain a register value without side effects.

This is a lower-level operation than readRegister in that it doesn't cause the register to be marked as having been read. It is typically used in situations where the register is being accessed for analysis purposes rather than as part of an instruction emulation.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ writeRegister()

virtual void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::writeRegister ( RegisterDescriptor  reg,
const BaseSemantics::SValuePtr a 
)
overridevirtual

Writes a value to a register.

The base implementation simply delegates to the current semantic State, which probably delegates to a register state, but subclasses are welcome to override this behavior at any level.

As with readRegister, writeRegister may need to perform various RISC operations in order to accomplish the task of writing a value to the specified register when the underlying register state doesn't actually store a value for that specific register. The RiscOperations object is passed along for that purpose. See readRegister for more details.

Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ readMemory()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::readMemory ( RegisterDescriptor  segreg,
const BaseSemantics::SValuePtr addr,
const BaseSemantics::SValuePtr dflt,
const BaseSemantics::SValuePtr cond 
)
overridevirtual

Reads a value from memory.

The implementation (in subclasses) will typically delegate much of the work to the current state's readMemory method.

A MemoryState will implement storage for memory locations and might impose certain restrictions, such as "all memory values must be eight bits". However, the readMemory should not have these constraints so that it can be called from a variety of Dispatcher subclass (e.g., the DispatcherX86 class assumes that readMemory is capable of reading 32-bit values from little-endian memory). The designers of the MemoryState, State, and RiscOperators should collaborate to decide which layer (RiscOperators, State, or MemoryState) is reponsible for combining individual memory locations into larger values. A RiscOperators object is passed along the chain of delegations for this purpose. The RiscOperators might also contain other data that's important during the process, such as an SMT solver.

The segreg argument is an optional segment register. Most architectures have a flat virtual address space and will pass a default-constructed register descriptor whose is_valid() method returns false.

The cond argument is a Boolean value that indicates whether this is a true read operation. If cond can be proven to be false then the read is a no-op and returns an arbitrary value.

The dflt argument determines the size of the value to be read. This argument is also passed along to the lower layers so that they can, if they desire, use it to initialize memory that has never been read or written before.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ peekMemory()

virtual BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::peekMemory ( RegisterDescriptor  segreg,
const BaseSemantics::SValuePtr addr,
const BaseSemantics::SValuePtr dflt 
)
overridevirtual

Read memory without side effects.

This is a lower-level operation than readMemory in that it doesn't cause any side effects in the memory state. In all other respects, it's similar to readMemory.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.

◆ writeMemory()

virtual void Rose::BinaryAnalysis::InstructionSemantics::TraceSemantics::RiscOperators::writeMemory ( RegisterDescriptor  segreg,
const BaseSemantics::SValuePtr addr,
const BaseSemantics::SValuePtr data,
const BaseSemantics::SValuePtr cond 
)
overridevirtual

Writes a value to memory.

The implementation (in subclasses) will typically delegate much of the work to the current state's writeMemory method.

The segreg argument is an optional segment register. Most architectures have a flat virtual address space and will pass a default-constructed register descriptor whose is_valid() method returns false.

The cond argument is a Boolean value that indicates whether this is a true write operation. If cond can be proved to be false then writeMemory is a no-op.

Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::RiscOperators.


The documentation for this class was generated from the following file: