DisassemblerX86.h

/* Disassembly specific to the x86 architecture. */

#ifndef ROSE_DISASSEMBLER_X86_H
#define ROSE_DISASSEMBLER_X86_H

#include "Disassembler.h"
#include "InstructionEnumsX86.h"
#include "Cxx_GrammarSerialization.h"

#include <boost/serialization/access.hpp>
#include <boost/serialization/base_object.hpp>
#include <boost/serialization/export.hpp>
#include <boost/serialization/split_member.hpp>

namespace Rose {
namespace BinaryAnalysis {

class DisassemblerX86: public Disassembler {
    /* Per-disassembler settings; see init() */
    X86InstructionSize insnSize;                
    /* Per-instruction settings; see startInstruction() */
    uint64_t ip;                                
    SgUnsignedCharList insnbuf;                 
    size_t insnbufat;                           
    /* Temporary flags set by the instruction; initialized by startInstruction() */
    X86SegmentRegister segOverride;             
    X86BranchPrediction branchPrediction;       /*FIXME: this seems to set only to x86_branch_prediction_true [RPM 2009-06-16] */
    bool branchPredictionEnabled;
    bool rexPresent, rexW, rexR, rexX, rexB;    
    bool sizeMustBe64Bit;                       
    bool operandSizeOverride;                   
    bool addressSizeOverride;                   
    bool lock;                                  
    X86RepeatPrefix repeatPrefix;               
    bool modregrmByteSet;                       
    uint8_t modregrmByte;                       
    uint8_t modeField;                          
    uint8_t regField;                           
    uint8_t rmField;                            
    SgAsmExpression *modrm;                     
    SgAsmExpression *reg;                       
    bool isUnconditionalJump;                   
    size_t wordSize;                            
    // Serialization
#ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
private:
    friend class boost::serialization::access;

    template<class S>
    void serialize_common(S &s, const unsigned /*version*/) {
        // Most of the data members don't need to be saved because we'll only save/restore disassemblers that are between
        // instructions (we never save one while it's processing an instruction). Therefore, most of the data members can be
        // constructed in their initial state by a combination of default constructor and init().
        s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Disassembler);
        s & BOOST_SERIALIZATION_NVP(wordSize);
    }

    template<class S>
    void save(S &s, const unsigned version) const {
        serialize_common(s, version);
    }

    template<class S>
    void load(S &s, const unsigned version) {
        serialize_common(s, version);
        init(wordSize);
    }

    BOOST_SERIALIZATION_SPLIT_MEMBER();
#endif

    // Constructors
    
protected:
    // Default constructor for serialization
    DisassemblerX86()
        : insnSize(x86_insnsize_none), ip(0), insnbufat(0), segOverride(x86_segreg_none),
          branchPrediction(x86_branch_prediction_none), branchPredictionEnabled(false), rexPresent(false), rexW(false), 
          rexR(false), rexX(false), rexB(false), sizeMustBe64Bit(false), operandSizeOverride(false), addressSizeOverride(false),
          lock(false), repeatPrefix(x86_repeat_none), modregrmByteSet(false), modregrmByte(0), modeField(0), rmField(0), 
          modrm(NULL), reg(NULL), isUnconditionalJump(false) {}

public:
    explicit DisassemblerX86(size_t wordsize)
        : insnSize(x86_insnsize_none), ip(0), insnbufat(0), segOverride(x86_segreg_none),
          branchPrediction(x86_branch_prediction_none), branchPredictionEnabled(false), rexPresent(false), rexW(false), 
          rexR(false), rexX(false), rexB(false), sizeMustBe64Bit(false), operandSizeOverride(false), addressSizeOverride(false),
          lock(false), repeatPrefix(x86_repeat_none), modregrmByteSet(false), modregrmByte(0), modeField(0), rmField(0), 
          modrm(NULL), reg(NULL), isUnconditionalJump(false) {
        init(wordsize);
    }

    virtual ~DisassemblerX86() {}

    virtual DisassemblerX86 *clone() const ROSE_OVERRIDE { return new DisassemblerX86(*this); }

    // Public methods
public:
    virtual bool canDisassemble(SgAsmGenericHeader*) const ROSE_OVERRIDE;

    virtual Unparser::BasePtr unparser() const ROSE_OVERRIDE;

    virtual SgAsmInstruction *disassembleOne(const MemoryMap::Ptr &map, rose_addr_t start_va,
                                             AddressSet *successors=NULL) ROSE_OVERRIDE;

    virtual SgAsmInstruction *makeUnknownInstruction(const Exception&) ROSE_OVERRIDE;


    /*========================================================================================================================
     * Data types
     *========================================================================================================================*/
private:

    class ExceptionX86: public Exception {
    public:
        ExceptionX86(const std::string &mesg, const DisassemblerX86 *d)
            : Exception(mesg, d->ip, d->insnbuf, 8*d->insnbufat)
            {}
        ExceptionX86(const std::string &mesg, const DisassemblerX86 *d, size_t bit)
            : Exception(mesg, d->ip, d->insnbuf, bit)
            {}
    };

    enum RegisterMode {
        rmLegacyByte, rmRexByte, rmWord, rmDWord, rmQWord, rmSegment, rmST, rmMM, rmXMM, rmControl, rmDebug, rmReturnNull
    };

    /* MMX registers? See mmPrefix method */
    enum MMPrefix {
        mmNone, mmF3, mm66, mmF2
    };


    /*========================================================================================================================
     * Methods for reading and writing bytes of the instruction.  These keep track of how much has been read or written.
     *========================================================================================================================*/
private:

    uint8_t getByte();

    uint16_t getWord();

    uint32_t getDWord();

    uint64_t getQWord();

    /*========================================================================================================================
     * Miscellaneous helper methods
     *========================================================================================================================*/
private:
    SgAsmExpression *currentDataSegment() const;

    X86InstructionSize effectiveAddressSize() const;

    RegisterMode effectiveOperandMode() const {
        return sizeToMode(effectiveOperandSize());
    }

    X86InstructionSize effectiveOperandSize() const;

    SgAsmType *effectiveOperandType() const {
        return sizeToType(effectiveOperandSize());
    }

    bool longMode() const {
        return insnSize == x86_insnsize_64;
    }

    /* FIXME: documentation? */
    MMPrefix mmPrefix() const;

    void not64() const {
        if (longMode())
            throw ExceptionX86("not valid for 64-bit code", this);
    }

    void setRex(uint8_t prefix);

    static RegisterMode sizeToMode(X86InstructionSize);

    static SgAsmType *sizeToType(X86InstructionSize s);



    /*========================================================================================================================
     * Methods that construct something. (Their names all start with "make".)
     *========================================================================================================================*/
private:

    SgAsmExpression *makeAddrSizeValue(int64_t val, size_t bit_offset, size_t bit_size);

    SgAsmX86Instruction *makeInstruction(X86InstructionKind kind, const std::string &mnemonic,
                                         SgAsmExpression *op1=NULL, SgAsmExpression *op2=NULL,
                                         SgAsmExpression *op3=NULL, SgAsmExpression *op4=NULL);

    SgAsmRegisterReferenceExpression *makeIP();

    /* FIXME: documentation? */
    SgAsmRegisterReferenceExpression *makeOperandRegisterByte(bool rexExtension, uint8_t registerNumber);

    /* FIXME: documentation? */
    SgAsmRegisterReferenceExpression *makeOperandRegisterFull(bool rexExtension, uint8_t registerNumber);

    SgAsmRegisterReferenceExpression *makeRegister(uint8_t fullRegisterNumber, RegisterMode,
                                                   SgAsmType *registerType=NULL) const;

    /* FIXME: documentation? */
    SgAsmRegisterReferenceExpression *makeRegisterEffective(uint8_t fullRegisterNumber) {
        return makeRegister(fullRegisterNumber, effectiveOperandMode());
    }

    /* FIXME: documentation? */
    SgAsmRegisterReferenceExpression *makeRegisterEffective(bool rexExtension, uint8_t registerNumber) {
        return makeRegister(registerNumber + (rexExtension ? 8 : 0), effectiveOperandMode());
    }

    SgAsmExpression *makeSegmentRegister(X86SegmentRegister so, bool insn64) const;



    /*========================================================================================================================
     * Methods for operating on the ModR/M byte.
     *========================================================================================================================*/
private:

    void getModRegRM(RegisterMode regMode, RegisterMode rmMode, SgAsmType *t, SgAsmType *tForReg = NULL);

    SgAsmMemoryReferenceExpression *decodeModrmMemory();

    void fillInModRM(RegisterMode rmMode, SgAsmType *t);

    SgAsmExpression *makeModrmNormal(RegisterMode, SgAsmType *mrType);

    SgAsmRegisterReferenceExpression *makeModrmRegister(RegisterMode, SgAsmType* mrType=NULL);

    void requireMemory() const {
        if (!modregrmByteSet)
            throw ExceptionX86("requires Mod/RM byte", this);
        if (modeField == 3)
            throw ExceptionX86("requires memory", this);
    }



    /*========================================================================================================================
     * Methods that construct an SgAsmExpression for an immediate operand.
     *========================================================================================================================*/
private:

    SgAsmExpression *getImmByte();
    SgAsmExpression *getImmWord();
    SgAsmExpression* getImmDWord();
    SgAsmExpression* getImmQWord();
    SgAsmExpression *getImmForAddr();
    SgAsmExpression *getImmIv();
    SgAsmExpression *getImmJz();
    SgAsmExpression *getImmByteAsIv();
    SgAsmExpression *getImmIzAsIv();
    SgAsmExpression *getImmJb();




    /*========================================================================================================================
     * Main disassembly functions, each generally containing a huge "switch" statement based on one of the opcode bytes.
     *========================================================================================================================*/
private:

    SgAsmX86Instruction *disassemble();

    SgAsmX86Instruction *decodeOpcode0F();

    SgAsmX86Instruction *decodeOpcode0F38();

    SgAsmX86Instruction *decodeX87InstructionD8();

    SgAsmX86Instruction *decodeX87InstructionD9();

    SgAsmX86Instruction *decodeX87InstructionDA();

    SgAsmX86Instruction *decodeX87InstructionDB();

    SgAsmX86Instruction *decodeX87InstructionDC();

    SgAsmX86Instruction *decodeX87InstructionDD();

    SgAsmX86Instruction *decodeX87InstructionDE();

    SgAsmX86Instruction *decodeX87InstructionDF();

    SgAsmX86Instruction *decodeGroup1(SgAsmExpression *imm);

    SgAsmX86Instruction *decodeGroup1a();

    SgAsmX86Instruction *decodeGroup2(SgAsmExpression *count);

    SgAsmX86Instruction *decodeGroup3(SgAsmExpression *immMaybe);

    SgAsmX86Instruction *decodeGroup4();

    SgAsmX86Instruction *decodeGroup5();

    SgAsmX86Instruction *decodeGroup6();

    SgAsmX86Instruction *decodeGroup7();

    SgAsmX86Instruction *decodeGroup8(SgAsmExpression *imm);

    SgAsmX86Instruction *decodeGroup11(SgAsmExpression *imm);

    SgAsmX86Instruction *decodeGroup15();

    SgAsmX86Instruction *decodeGroup16();

    SgAsmX86Instruction *decodeGroupP();



    /*========================================================================================================================
     * Supporting functions
     *========================================================================================================================*/
private:

    void init(size_t wordsize);

    void startInstruction(SgAsmX86Instruction *insn) {
        startInstruction(insn->get_address(), NULL, 0);
        insnSize = insn->get_baseSize();
        lock = insn->get_lockPrefix();
        branchPrediction = insn->get_branchPrediction();
        branchPredictionEnabled = branchPrediction != x86_branch_prediction_none;
        segOverride = insn->get_segmentOverride();
    }
    
    void startInstruction(rose_addr_t start_va, const uint8_t *buf, size_t bufsz) {
        ip = start_va;
        insnbuf = SgUnsignedCharList(buf, buf+bufsz);
        insnbufat = 0;

        /* Prefix flags */
        segOverride = x86_segreg_none;
        branchPrediction = x86_branch_prediction_none;
        branchPredictionEnabled = false;
        rexPresent = rexW = rexR = rexX = rexB = false;
        sizeMustBe64Bit = false;
        operandSizeOverride = false;
        addressSizeOverride = false;
        lock = false;
        repeatPrefix = x86_repeat_none;
        modregrmByteSet = false;
        modregrmByte = modeField = regField = rmField = 0; /*arbitrary since modregrmByteSet is false*/
        modrm = reg = NULL;
        isUnconditionalJump = false;
    }
};

} // namespace
} // namespace

#ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
BOOST_CLASS_EXPORT_KEY(Rose::BinaryAnalysis::DisassemblerX86);
#endif

#endif