ROSE 0.11.145.147
DispatcherCil.h
1#ifndef ROSE_BinaryAnalysis_InstructionSemantics_DispatcherCil_H
2#define ROSE_BinaryAnalysis_InstructionSemantics_DispatcherCil_H
3#include <featureTests.h>
4#ifdef ROSE_ENABLE_BINARY_ANALYSIS
5
6#include <Rose/BinaryAnalysis/BasicTypes.h>
7#include <Rose/BinaryAnalysis/InstructionSemantics/BaseSemantics.h>
8#include <Rose/BinaryAnalysis/InstructionEnumsCil.h>
9
10#include <boost/serialization/access.hpp>
11#include <boost/serialization/base_object.hpp>
12#include <boost/serialization/export.hpp>
13#include <boost/serialization/split_member.hpp>
14
15namespace Rose {
16namespace BinaryAnalysis {
17namespace InstructionSemantics {
18
20typedef boost::shared_ptr<class DispatcherCil> DispatcherCilPtr;
21
23public:
26
29
30public:
40 // Floating-point condition code bits
42 // Floating-point status register exception bits
45 // Floating-point status register accrued exception bits
49#ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
50private:
51 friend class boost::serialization::access;
52
53 template<class S>
54 void save(S &s, const unsigned /*version*/) const {
55 s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Super);
56 };
57
58 template<class S>
59 void load(S &s, const unsigned /*version*/) {
60 s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Super);
62 iproc_init();
64 }
65
66 BOOST_SERIALIZATION_SPLIT_MEMBER();
67#endif
68
69private:
70 DispatcherCil(); // used only by boost::serialization
71
72protected:
73 DispatcherCil(const Architecture::BaseConstPtr&); // prototypical constructor
74
76
80 void iproc_init();
81
86
91
92public:
94
99
102
105
108
110 virtual RegisterDescriptor stackPointerRegister() const override;
111 virtual RegisterDescriptor stackFrameRegister() const override;
112 virtual RegisterDescriptor callReturnRegister() const override;
113 virtual int iprocKey(SgAsmInstruction *insn_) const override;
114 virtual BaseSemantics::SValuePtr read(SgAsmExpression*, size_t value_nbits, size_t addr_nbits=0) override;
115
118 const BaseSemantics::SValuePtr &b, SgAsmType *bType);
119
122 const BaseSemantics::SValuePtr &b, SgAsmType *bType);
123
129 void updateFpsrExcOvfl(const BaseSemantics::SValuePtr &intermediate, SgAsmType *valueType,
130 SgAsmType *rounding, SgAsmType *dstType);
131
139 void updateFpsrExcUnfl(const BaseSemantics::SValuePtr &intermediate, SgAsmType *valueType,
140 SgAsmType *rounding, SgAsmType *dstType);
141
144
147
150
153};
154
155} // namespace
156} // namespace
157} // namespace
158
159#ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
161#endif
162
163#endif
164#endif
Dispatches instructions through the RISC layer.
Definition Dispatcher.h:43
Base class for most instruction semantics RISC operators.
static DispatcherCilPtr instance(const Architecture::BaseConstPtr &, const BaseSemantics::RiscOperatorsPtr &)
Constructor.
void iproc_init()
Loads the iproc table with instruction processing functors.
void updateFpsrExcUnfl(const BaseSemantics::SValuePtr &intermediate, SgAsmType *valueType, SgAsmType *rounding, SgAsmType *dstType)
Set or clear FPSR EXC UVFL bit.
void updateFpsrExcInan(const BaseSemantics::SValuePtr &a, SgAsmType *aType, const BaseSemantics::SValuePtr &b, SgAsmType *bType)
Set or clear FPSR EXC INAN bit.
virtual BaseSemantics::SValuePtr read(SgAsmExpression *, size_t value_nbits, size_t addr_nbits=0) override
Reads an R-value expression.
virtual int iprocKey(SgAsmInstruction *insn_) const override
Given an instruction, return the InsnProcessor key that can be used as an index into the iproc_table.
void memory_init()
Make sure memory is set up correctly.
void updateFpsrExcIde(const BaseSemantics::SValuePtr &a, SgAsmType *aType, const BaseSemantics::SValuePtr &b, SgAsmType *bType)
Set or clear FPSR EXC IDE bit.
BaseSemantics::SValuePtr condition(CilInstructionKind, BaseSemantics::RiscOperators *)
Determines if an instruction should branch.
virtual RegisterDescriptor stackFrameRegister() const override
Returns the stack call frame register.
void updateFpsrExcInex()
Set or clear FPSR EXC INEX bit.
DispatcherCilPtr Ptr
Shared-ownership pointer.
virtual RegisterDescriptor callReturnRegister() const override
Returns the function call return address register.
void updateFpsrExcOvfl(const BaseSemantics::SValuePtr &intermediate, SgAsmType *valueType, SgAsmType *rounding, SgAsmType *dstType)
Set or clear FPSR EXC OVFL bit.
virtual RegisterDescriptor stackPointerRegister() const override
Returns the stack pointer register.
static DispatcherCilPtr instance(const Architecture::BaseConstPtr &)
Construct a prototypical dispatcher.
void regcache_init()
Load the cached register descriptors.
static DispatcherCilPtr promote(const BaseSemantics::DispatcherPtr &)
Dynamic cast to DispatcherCilPtr with assertion.
virtual RegisterDescriptor instructionPointerRegister() const override
Returns the instruction pointer register.
void accumulateFpExceptions()
Update accrued floating-point exceptions.
virtual BaseSemantics::DispatcherPtr create(const BaseSemantics::RiscOperatorsPtr &) const override
Virtual constructor.
void adjustFpConditionCodes(const BaseSemantics::SValuePtr &result, SgAsmFloatType *)
Set floating point condition codes according to result.
Describes (part of) a physical CPU register.
Base class for expressions.
Floating point types.
Base class for machine instructions.
Base class for binary types.
std::shared_ptr< const Base > BaseConstPtr
Reference counted pointer for Architecture::Base.
boost::shared_ptr< RiscOperators > RiscOperatorsPtr
Shared-ownership pointer to a RISC operators object.
boost::shared_ptr< Dispatcher > DispatcherPtr
Shared-ownership pointer to a semantics instruction dispatcher.
boost::shared_ptr< class DispatcherCil > DispatcherCilPtr
Shared-ownership pointer to an CIL instruction dispatcher.
The ROSE library.