ROSE  0.11.109.0
DispatcherCil.h
1 #ifndef ROSE_BinaryAnalysis_InstructionSemantics_DispatcherCil_H
2 #define ROSE_BinaryAnalysis_InstructionSemantics_DispatcherCil_H
3 #include <featureTests.h>
4 #ifdef ROSE_ENABLE_BINARY_ANALYSIS
5 
6 #include <Rose/BinaryAnalysis/BasicTypes.h>
7 #include <Rose/BinaryAnalysis/InstructionSemantics/BaseSemantics.h>
8 
9 #include <boost/serialization/access.hpp>
10 #include <boost/serialization/base_object.hpp>
11 #include <boost/serialization/export.hpp>
12 #include <boost/serialization/split_member.hpp>
13 
14 namespace Rose {
15 namespace BinaryAnalysis {
16 namespace InstructionSemantics {
17 
19 typedef boost::shared_ptr<class DispatcherCil> DispatcherCilPtr;
20 
22 public:
25 
28 
29 public:
39  // Floating-point condition code bits
41  // Floating-point status register exception bits
44  // Floating-point status register accrued exception bits
48 #ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
49 private:
50  friend class boost::serialization::access;
51 
52  template<class S>
53  void save(S &s, const unsigned /*version*/) const {
54  s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Super);
55  };
56 
57  template<class S>
58  void load(S &s, const unsigned /*version*/) {
59  s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Super);
60  regcache_init();
61  iproc_init();
62  memory_init();
63  }
64 
65  BOOST_SERIALIZATION_SPLIT_MEMBER();
66 #endif
67 
68 protected:
69  // prototypical constructor
70  DispatcherCil();
71 
72  DispatcherCil(const BaseSemantics::RiscOperatorsPtr&, size_t addrWidth, const RegisterDictionaryPtr&);
73 
75  void iproc_init();
76 
80  void regcache_init();
81 
83  void memory_init();
84 
85 public:
86  ~DispatcherCil();
87 
90  static DispatcherCilPtr instance();
91 
93  static DispatcherCilPtr instance(const BaseSemantics::RiscOperatorsPtr&, size_t addrWidth, const RegisterDictionaryPtr&);
94 
97  const RegisterDictionaryPtr&) const override;
98 
100  static DispatcherCilPtr promote(const BaseSemantics::DispatcherPtr&);
101 
102  virtual void set_register_dictionary(const RegisterDictionaryPtr&) override;
103 
104  virtual RegisterDescriptor instructionPointerRegister() const override;
105  virtual RegisterDescriptor stackPointerRegister() const override;
106  virtual RegisterDescriptor stackFrameRegister() const override;
107  virtual RegisterDescriptor callReturnRegister() const override;
108 
109  virtual int iprocKey(SgAsmInstruction *insn_) const override {
110  SgAsmCilInstruction *insn = isSgAsmCilInstruction(insn_);
111  ASSERT_not_null(insn);
112  return insn->get_kind();
113  }
114 
115  virtual BaseSemantics::SValuePtr read(SgAsmExpression*, size_t value_nbits, size_t addr_nbits=0) override;
116 
119  const BaseSemantics::SValuePtr &b, SgAsmType *bType);
120 
123  const BaseSemantics::SValuePtr &b, SgAsmType *bType);
124 
130  void updateFpsrExcOvfl(const BaseSemantics::SValuePtr &intermediate, SgAsmType *valueType,
131  SgAsmType *rounding, SgAsmType *dstType);
132 
140  void updateFpsrExcUnfl(const BaseSemantics::SValuePtr &intermediate, SgAsmType *valueType,
141  SgAsmType *rounding, SgAsmType *dstType);
142 
144  void updateFpsrExcInex();
145 
148 
150  void accumulateFpExceptions();
151 
154 };
155 
156 } // namespace
157 } // namespace
158 } // namespace
159 
160 #ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
162 #endif
163 
164 #endif
165 #endif
void memory_init()
Make sure memory is set up correctly.
RegisterDescriptor REG_EXC_INEX
Cached register.
Definition: DispatcherCil.h:43
RegisterDescriptor REG_AEXC_DZ
Cached register.
Definition: DispatcherCil.h:45
RegisterDescriptor REG_AEXC_INEX
Cached register.
Definition: DispatcherCil.h:45
RegisterDescriptor REG_FPCC_N
Cached register.
Definition: DispatcherCil.h:40
boost::shared_ptr< RiscOperators > RiscOperatorsPtr
Shared-ownership pointer to a RISC operators object.
RegisterDescriptor REG_EXC_OPERR
Cached register.
Definition: DispatcherCil.h:42
void updateFpsrExcInex()
Set or clear FPSR EXC INEX bit.
Base class for machine instructions.
virtual int iprocKey(SgAsmInstruction *insn_) const override
Given an instruction, return the InsnProcessor key that can be used as an index into the iproc_table...
RegisterDescriptor REG_MACSR_FI
Cached register.
Definition: DispatcherCil.h:37
RegisterDescriptor REG_AEXC_UNFL
Cached register.
Definition: DispatcherCil.h:45
RegisterDescriptor REG_FPCC_Z
Cached register.
Definition: DispatcherCil.h:40
virtual RegisterDescriptor stackFrameRegister() const override
Returns the stack call frame register.
CilInstructionKind
CIL instruction types.
RegisterDescriptor REG_FP[8]
Cached register.
Definition: DispatcherCil.h:36
RegisterDescriptor REG_FPCC_I
Cached register.
Definition: DispatcherCil.h:40
RegisterDescriptor REG_EXC_OVFL
Cached register.
Definition: DispatcherCil.h:42
void regcache_init()
Load the cached register descriptors.
virtual RegisterDescriptor callReturnRegister() const override
Returns the function call return address register.
RegisterDescriptor REG_EXC_BSUN
Cached register.
Definition: DispatcherCil.h:42
Main namespace for the ROSE library.
RegisterDescriptor REG_AEXC_OVFL
Cached register.
Definition: DispatcherCil.h:45
virtual RegisterDescriptor instructionPointerRegister() const override
Returns the instruction pointer register.
RegisterDescriptor REG_MAC_MASK
Cached register.
Definition: DispatcherCil.h:37
RegisterDescriptor REG_MACSR_C
Cached register.
Definition: DispatcherCil.h:37
RegisterDescriptor REG_D[8]
Cached register.
Definition: DispatcherCil.h:36
RegisterDescriptor REG_MACEXT2
Cached register.
Definition: DispatcherCil.h:38
boost::shared_ptr< Dispatcher > DispatcherPtr
Shared-ownership pointer to a semantics instruction dispatcher.
Dispatches instructions through the RISC layer.
Definition: Dispatcher.h:44
Rose::BinaryAnalysis::CilInstructionKind get_kind() const
Property: Instruction kind.
RegisterDescriptor REG_FPCC_NAN
Cached register.
Definition: DispatcherCil.h:40
RegisterDescriptor REG_MACEXT0
Cached register.
Definition: DispatcherCil.h:38
RegisterDescriptor REG_MACEXT3
Cached register.
Definition: DispatcherCil.h:38
BaseSemantics::SValuePtr condition(CilInstructionKind, BaseSemantics::RiscOperators *)
Determines if an instruction should branch.
Describes (part of) a physical CPU register.
boost::shared_ptr< class DispatcherCil > DispatcherCilPtr
Shared-ownership pointer to an CIL instruction dispatcher.
Definition: DispatcherCil.h:19
RegisterDescriptor REG_MACSR_V
Cached register.
Definition: DispatcherCil.h:37
void updateFpsrExcUnfl(const BaseSemantics::SValuePtr &intermediate, SgAsmType *valueType, SgAsmType *rounding, SgAsmType *dstType)
Set or clear FPSR EXC UVFL bit.
void adjustFpConditionCodes(const BaseSemantics::SValuePtr &result, SgAsmFloatType *)
Set floating point condition codes according to result.
RegisterDescriptor REG_EXC_IDE
Cached register.
Definition: DispatcherCil.h:43
RegisterDescriptor REG_EXC_UNFL
Cached register.
Definition: DispatcherCil.h:42
RegisterDescriptor REG_AEXC_IOP
Cached register.
Definition: DispatcherCil.h:45
Base class for expressions.
RegisterDescriptor REG_MACSR_Z
Cached register.
Definition: DispatcherCil.h:37
void updateFpsrExcInan(const BaseSemantics::SValuePtr &a, SgAsmType *aType, const BaseSemantics::SValuePtr &b, SgAsmType *bType)
Set or clear FPSR EXC INAN bit.
RegisterDescriptor REG_EXC_INAN
Cached register.
Definition: DispatcherCil.h:42
static DispatcherCilPtr promote(const BaseSemantics::DispatcherPtr &)
Dynamic cast to DispatcherCilPtr with assertion.
Base class for binary types.
void iproc_init()
Loads the iproc table with instruction processing functors.
RegisterDescriptor REG_MACSR_N
Cached register.
Definition: DispatcherCil.h:37
RegisterDescriptor REG_A[8]
Cached register.
Definition: DispatcherCil.h:36
DispatcherCilPtr Ptr
Shared-ownership pointer.
Definition: DispatcherCil.h:27
static DispatcherCilPtr instance()
Construct a prototypical dispatcher.
Base class for most instruction semantics RISC operators.
Definition: RiscOperators.h:49
virtual BaseSemantics::SValuePtr read(SgAsmExpression *, size_t value_nbits, size_t addr_nbits=0) override
Reads an R-value expression.
RegisterDescriptor REG_EXC_DZ
Cached register.
Definition: DispatcherCil.h:42
void updateFpsrExcIde(const BaseSemantics::SValuePtr &a, SgAsmType *aType, const BaseSemantics::SValuePtr &b, SgAsmType *bType)
Set or clear FPSR EXC IDE bit.
RegisterDescriptor REG_MACSR_SU
Cached register.
Definition: DispatcherCil.h:37
void updateFpsrExcOvfl(const BaseSemantics::SValuePtr &intermediate, SgAsmType *valueType, SgAsmType *rounding, SgAsmType *dstType)
Set or clear FPSR EXC OVFL bit.
Floating point types.
RegisterDescriptor REG_MACEXT1
Cached register.
Definition: DispatcherCil.h:38
virtual RegisterDescriptor stackPointerRegister() const override
Returns the stack pointer register.
virtual BaseSemantics::DispatcherPtr create(const BaseSemantics::RiscOperatorsPtr &, size_t addrWidth, const RegisterDictionaryPtr &) const override
Virtual constructor.
void accumulateFpExceptions()
Update accrued floating-point exceptions.