DispatcherPowerpc.h

// Semantics for 32-bit Motorola-IBM PowerPC microprocessors using ROSE instruction semantics API2
// This code was derived from $ROSE/projects/assemblyToSourceAst/powerpcInstructionSemantics.h,
// which is mostly a copy of $ROSE/projects/SemanticSignatureVectors/powerpcInstructionSemantics.h
//
// The ROSE style guide indicates that PowerPC, when used as part of a symbol in ROSE source code,
// should be capitalized as "Powerpc" (e.g., "DispatcherPowerpc", the same rule that consistently
// capitializes x86 as "DispatcherX86").
#ifndef ROSE_BinaryAnalysis_InstructionSemantics_DispatcherPowerpc_H
#define ROSE_BinaryAnalysis_InstructionSemantics_DispatcherPowerpc_H
#include <featureTests.h>
#ifdef ROSE_ENABLE_BINARY_ANALYSIS
 
#include <Rose/BinaryAnalysis/BasicTypes.h>
#include <Rose/BinaryAnalysis/InstructionSemantics/BaseSemantics.h>
 
#ifdef ROSE_ENABLE_BOOST_SERIALIZATION
#include <boost/serialization/access.hpp>
#include <boost/serialization/base_object.hpp>
#include <boost/serialization/export.hpp>
#include <boost/serialization/split_member.hpp>
#endif
 
namespace Rose {
namespace BinaryAnalysis {
namespace InstructionSemantics {
 
typedef boost::shared_ptr<class DispatcherPowerpc> DispatcherPowerpcPtr;
 
class DispatcherPowerpc: public BaseSemantics::Dispatcher {
public:
    using Super = BaseSemantics::Dispatcher;
 
    using Ptr = DispatcherPowerpcPtr;
 
    RegisterDescriptor REG_IAR, REG_LR, REG_XER, REG_XER_CA, REG_XER_OV, REG_XER_SO, REG_CTR;
    RegisterDescriptor REG_CR, REG_CR0, REG_CR0_LT;
#ifdef ROSE_ENABLE_BOOST_SERIALIZATION
private:
    friend class boost::serialization::access;
 
    template<class S>
    void save(S &s, const unsigned /*version*/) const {
        s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Super);
    }
 
    template<class S>
    void load(S &s, const unsigned /*version*/) {
        s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Super);
        regcache_init();
        iproc_init();
        memory_init();
    }
 
    BOOST_SERIALIZATION_SPLIT_MEMBER();
#endif
 
private:
    DispatcherPowerpc();                                // used only by boost::serialization
 
protected:
    DispatcherPowerpc(const Architecture::BaseConstPtr&); // Prototypical constructor
 
    DispatcherPowerpc(const Architecture::BaseConstPtr&, const BaseSemantics::RiscOperatorsPtr&);
 
public:
    ~DispatcherPowerpc();
 
private:
    void iproc_init();
 
    void regcache_init();
 
    void memory_init();
 
public:
    static DispatcherPowerpcPtr instance(const Architecture::BaseConstPtr&);
 
    static DispatcherPowerpcPtr instance(const Architecture::BaseConstPtr&, const BaseSemantics::RiscOperatorsPtr&);
 
    virtual BaseSemantics::DispatcherPtr create(const BaseSemantics::RiscOperatorsPtr&) const override;
 
    static DispatcherPowerpcPtr promote(const BaseSemantics::DispatcherPtr&);
 
    virtual RegisterDescriptor instructionPointerRegister() const override;
    virtual RegisterDescriptor callReturnRegister() const override;
 
    virtual int iprocKey(SgAsmInstruction *insn_) const override;
 
    void setXerOverflow(const BaseSemantics::SValuePtr &hadOverflow);
 
    virtual void updateCr0(const BaseSemantics::SValuePtr &result);
 
    BaseSemantics::SValuePtr readAndUpdate(BaseSemantics::RiscOperators*, SgAsmExpression*, size_t valueNBits);
 
    void writeAndUpdate(BaseSemantics::RiscOperators*, SgAsmExpression *destination, const BaseSemantics::SValuePtr &value);
};
class DispatcherPowerpc: public BaseSemantics::Dispatcher {…};
        
} // namespace
} // namespace
} // namespace
 
#ifdef ROSE_ENABLE_BOOST_SERIALIZATION
BOOST_CLASS_EXPORT_KEY(Rose::BinaryAnalysis::InstructionSemantics::DispatcherPowerpc);
#endif
 
#endif
#endif