8 #ifndef ROSE_DispatcherPpc_H
9 #define ROSE_DispatcherPpc_H
10 #include <featureTests.h>
11 #ifdef ROSE_ENABLE_BINARY_ANALYSIS
13 #include "BaseSemantics2.h"
15 #include <boost/serialization/access.hpp>
16 #include <boost/serialization/base_object.hpp>
17 #include <boost/serialization/export.hpp>
18 #include <boost/serialization/split_member.hpp>
22 namespace InstructionSemantics2 {
38 #ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
40 friend class boost::serialization::access;
43 void save(S &s,
const unsigned )
const {
44 s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Super);
48 void load(S &s,
const unsigned ) {
49 s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Super);
55 BOOST_SERIALIZATION_SPLIT_MEMBER();
63 DispatcherPowerpc(
size_t addrWidth,
const RegisterDictionary *regs)
68 ASSERT_require(32==addrWidth || 64==addrWidth);
109 return instance(ops, addrWidth, regs);
115 assert(retval!=NULL);
154 #ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
boost::shared_ptr< RiscOperators > RiscOperatorsPtr
Shared-ownership pointer to a RISC operators object.
virtual void initializeState(const StatePtr &)
Initialize the state.
RegisterDescriptor REG_CTR
Cached register.
virtual RegisterDescriptor stackPointerRegister() const ROSE_OVERRIDE
Returns the stack pointer register.
RegisterDescriptor REG_CR
Cached register.
Base class for machine instructions.
BaseSemantics::SValuePtr readAndUpdate(BaseSemantics::RiscOperators *, SgAsmExpression *, size_t valueNBits)
Reads from a memory address and updates a register with the effective address that was read...
virtual RegisterDescriptor callReturnRegister() const ROSE_OVERRIDE
Returns the function call return address register.
RegisterDescriptor REG_LR
Cached register.
Main namespace for the ROSE library.
void regcache_init()
Load the cached register descriptors.
virtual const RegisterDictionary * get_register_dictionary() const
Access the register dictionary.
void memory_init()
Make sure memory is set up correctly.
virtual void set_register_dictionary(const RegisterDictionary *regdict) ROSE_OVERRIDE
Access the register dictionary.
RegisterDescriptor REG_CR0
Cached register.
boost::shared_ptr< Dispatcher > DispatcherPtr
Shared-ownership pointer to a semantics instruction dispatcher.
virtual RegisterDescriptor instructionPointerRegister() const ROSE_OVERRIDE
Returns the instruction pointer register.
Base classes for instruction semantics.
RegisterDescriptor REG_XER_OV
Cached register.
virtual BaseSemantics::DispatcherPtr create(const BaseSemantics::RiscOperatorsPtr &ops, size_t addrWidth=0, const RegisterDictionary *regs=NULL) const ROSE_OVERRIDE
Virtual constructor.
Describes (part of) a physical CPU register.
size_t addressWidth() const
Property: Width of memory addresses.
RegisterDescriptor REG_XER
Cached register.
boost::shared_ptr< class DispatcherPowerpc > DispatcherPowerpcPtr
Shared-ownership pointer to a PowerPC instruction dispatcher.
virtual int iproc_key(SgAsmInstruction *insn_) const ROSE_OVERRIDE
Given an instruction, return the InsnProcessor key that can be used as an index into the iproc_table...
Represents one PowerPC machine instruction.
Rose::BinaryAnalysis::PowerpcInstructionKind get_kind() const
Property: Instruction kind.
RegisterDescriptor REG_XER_CA
Cached register.
void iproc_init()
Loads the iproc table with instruction processing functors.
Base class for most instruction semantics RISC operators.
const RegisterDictionary * regdict
See set_register_dictionary().
Base class for expressions.
Dispatches instructions through the RISC layer.
void setXerOverflow(const BaseSemantics::SValuePtr &hadOverflow)
Set the XER OV and SO bits as specified.
RegisterDescriptor REG_XER_SO
Cached register.
static DispatcherPowerpcPtr instance()
Construct a prototypical dispatcher.
RegisterDescriptor REG_IAR
Cached register.
static DispatcherPowerpcPtr instance(const BaseSemantics::RiscOperatorsPtr &ops, size_t addrWidth, const RegisterDictionary *regs=NULL)
Constructor.
Defines registers available for a particular architecture.
static DispatcherPowerpcPtr instance(size_t addrWidth, const RegisterDictionary *regs=NULL)
Constructor.
virtual void updateCr0(const BaseSemantics::SValuePtr &result)
Write status flags for result.
static DispatcherPowerpcPtr promote(const BaseSemantics::DispatcherPtr &d)
Dynamic cast to a DispatcherPowerpcPtr with assertion.
RegisterDescriptor REG_CR0_LT
Cached register.
void writeAndUpdate(BaseSemantics::RiscOperators *, SgAsmExpression *destination, const BaseSemantics::SValuePtr &value)
Writes a value to a memory address and updates a register with the effective address to which the val...