ROSE 0.11.145.147
DispatcherPowerpc.h
1// Semantics for 32-bit Motorola-IBM PowerPC microprocessors using ROSE instruction semantics API2
2// This code was derived from $ROSE/projects/assemblyToSourceAst/powerpcInstructionSemantics.h,
3// which is mostly a copy of $ROSE/projects/SemanticSignatureVectors/powerpcInstructionSemantics.h
4//
5// The ROSE style guide indicates that PowerPC, when used as part of a symbol in ROSE source code,
6// should be capitalized as "Powerpc" (e.g., "DispatcherPowerpc", the same rule that consistently
7// capitializes x86 as "DispatcherX86").
8#ifndef ROSE_BinaryAnalysis_InstructionSemantics_DispatcherPowerpc_H
9#define ROSE_BinaryAnalysis_InstructionSemantics_DispatcherPowerpc_H
10#include <featureTests.h>
11#ifdef ROSE_ENABLE_BINARY_ANALYSIS
12
13#include <Rose/BinaryAnalysis/BasicTypes.h>
14#include <Rose/BinaryAnalysis/InstructionSemantics/BaseSemantics.h>
15
16#include <boost/serialization/access.hpp>
17#include <boost/serialization/base_object.hpp>
18#include <boost/serialization/export.hpp>
19#include <boost/serialization/split_member.hpp>
20
21namespace Rose {
22namespace BinaryAnalysis {
23namespace InstructionSemantics {
24
26typedef boost::shared_ptr<class DispatcherPowerpc> DispatcherPowerpcPtr;
27
29public:
32
35
46#ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
47private:
48 friend class boost::serialization::access;
49
50 template<class S>
51 void save(S &s, const unsigned /*version*/) const {
52 s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Super);
53 }
54
55 template<class S>
56 void load(S &s, const unsigned /*version*/) {
57 s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Super);
58 regcache_init();
59 iproc_init();
60 memory_init();
61 }
62
63 BOOST_SERIALIZATION_SPLIT_MEMBER();
64#endif
65
66private:
67 DispatcherPowerpc(); // used only by boost::serialization
68
69protected:
70 DispatcherPowerpc(const Architecture::BaseConstPtr&); // Prototypical constructor
71
72 DispatcherPowerpc(const Architecture::BaseConstPtr&, const BaseSemantics::RiscOperatorsPtr&);
73
74public:
75 ~DispatcherPowerpc();
76
77private:
81 void iproc_init();
82
86 void regcache_init();
87
91 void memory_init();
92
93public:
98
101
104
107
109 virtual RegisterDescriptor stackPointerRegister() const override;
110 virtual RegisterDescriptor stackFrameRegister() const override;
111 virtual RegisterDescriptor callReturnRegister() const override;
112
113 virtual int iprocKey(SgAsmInstruction *insn_) const override;
114
119 void setXerOverflow(const BaseSemantics::SValuePtr &hadOverflow);
120
122 virtual void updateCr0(const BaseSemantics::SValuePtr &result);
123
127
132};
133
134} // namespace
135} // namespace
136} // namespace
137
138#ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
140#endif
141
142#endif
143#endif
Dispatches instructions through the RISC layer.
Definition Dispatcher.h:43
Base class for most instruction semantics RISC operators.
static DispatcherPowerpcPtr instance(const Architecture::BaseConstPtr &, const BaseSemantics::RiscOperatorsPtr &)
Constructor.
void setXerOverflow(const BaseSemantics::SValuePtr &hadOverflow)
Set the XER OV and SO bits as specified.
void writeAndUpdate(BaseSemantics::RiscOperators *, SgAsmExpression *destination, const BaseSemantics::SValuePtr &value)
Writes a value to a memory address and updates a register with the effective address to which the val...
virtual RegisterDescriptor instructionPointerRegister() const override
Returns the instruction pointer register.
virtual RegisterDescriptor stackPointerRegister() const override
Returns the stack pointer register.
virtual void updateCr0(const BaseSemantics::SValuePtr &result)
Write status flags for result.
virtual RegisterDescriptor callReturnRegister() const override
Returns the function call return address register.
DispatcherPowerpcPtr Ptr
Shared-ownership pointer.
virtual int iprocKey(SgAsmInstruction *insn_) const override
Given an instruction, return the InsnProcessor key that can be used as an index into the iproc_table.
static DispatcherPowerpcPtr promote(const BaseSemantics::DispatcherPtr &)
Dynamic cast to a DispatcherPowerpcPtr with assertion.
BaseSemantics::SValuePtr readAndUpdate(BaseSemantics::RiscOperators *, SgAsmExpression *, size_t valueNBits)
Reads from a memory address and updates a register with the effective address that was read.
static DispatcherPowerpcPtr instance(const Architecture::BaseConstPtr &)
Construct a prototypical dispatcher.
virtual RegisterDescriptor stackFrameRegister() const override
Returns the stack call frame register.
virtual BaseSemantics::DispatcherPtr create(const BaseSemantics::RiscOperatorsPtr &) const override
Virtual constructor.
Describes (part of) a physical CPU register.
Base class for expressions.
Base class for machine instructions.
std::shared_ptr< const Base > BaseConstPtr
Reference counted pointer for Architecture::Base.
boost::shared_ptr< RiscOperators > RiscOperatorsPtr
Shared-ownership pointer to a RISC operators object.
boost::shared_ptr< Dispatcher > DispatcherPtr
Shared-ownership pointer to a semantics instruction dispatcher.
boost::shared_ptr< class DispatcherPowerpc > DispatcherPowerpcPtr
Shared-ownership pointer to a PowerPC instruction dispatcher.
The ROSE library.