1#ifndef ROSE_BinaryAnalysis_InstructionSemantics_DispatcherX86_H
2#define ROSE_BinaryAnalysis_InstructionSemantics_DispatcherX86_H
3#include <featureTests.h>
4#ifdef ROSE_ENABLE_BINARY_ANALYSIS
5#include <Rose/BinaryAnalysis/BasicTypes.h>
7#include <Rose/BinaryAnalysis/InstructionEnumsX86.h>
8#include <Rose/BinaryAnalysis/InstructionSemantics/BaseSemantics/Dispatcher.h>
9#include <Rose/BinaryAnalysis/RegisterDictionary.h>
11#include <sageContainer.h>
13#include <boost/serialization/access.hpp>
14#include <boost/serialization/base_object.hpp>
15#include <boost/serialization/export.hpp>
16#include <boost/serialization/split_member.hpp>
19namespace BinaryAnalysis {
20namespace InstructionSemantics {
40 X86InstructionSize processorMode_;
74#ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
76 friend class boost::serialization::access;
79 void save(S &s,
const unsigned )
const {
80 s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(
Super);
81 s & BOOST_SERIALIZATION_NVP(processorMode_);
85 void load(S &s,
const unsigned ) {
86 s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(
Super);
87 s & BOOST_SERIALIZATION_NVP(processorMode_);
93 BOOST_SERIALIZATION_SPLIT_MEMBER();
158 enum AccessMode { READ_REGISTER, PEEK_REGISTER };
222 size_t rotateSignificantBits);
233 size_t shiftSignificantBits);
280 typedef const SgAsmExpressionPtrList &A;
281 virtual void p(
D,
Ops,
I, A) = 0;
283 virtual void assert_args(
I insn, A args,
size_t nargs);
284 void check_arg_width(
D d,
I insn, A args);
293#ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
Dispatches instructions through the RISC layer.
Functor that knows how to dispatch a single kind of instruction.
Base class for most instruction semantics RISC operators.
Semantically evaluates Intel x86 instructions.
RegisterDescriptor REG_DS
Cached register.
virtual void popFloatingPoint()
Pop the top item from the floating point stack.
RegisterDescriptor REG_EDX
Cached register.
RegisterDescriptor REG_R8
Cached register.
static DispatcherX86Ptr instance(const Architecture::BaseConstPtr &, const BaseSemantics::RiscOperatorsPtr &)
Constructor.
RegisterDescriptor REG_ESP
Cached register.
void memory_init()
Make sure memory properties are set up correctly.
RegisterDescriptor REG_anyCX
Cached register.
virtual RegisterDescriptor callReturnRegister() const override
Returns the function call return address register.
RegisterDescriptor REG_AF
Cached register.
RegisterDescriptor REG_FPCTL
Cached register.
RegisterDescriptor REG_FS
Cached register.
RegisterDescriptor REG_DI
Cached register.
virtual BaseSemantics::SValuePtr readFloatingPointStack(size_t position)
Read a value from the floating point stack.
virtual BaseSemantics::SValuePtr fixMemoryAddress(const BaseSemantics::SValuePtr &address) const
Extend or truncate value to propert memory address width.
RegisterDescriptor REG_EBX
Cached register.
RegisterDescriptor REG_AX
Cached register.
virtual BaseSemantics::SValuePtr doRotateOperation(X86InstructionKind kind, const BaseSemantics::SValuePtr &operand, const BaseSemantics::SValuePtr &total_rotate, size_t rotateSignificantBits)
Implements the RCL, RCR, ROL, and ROR instructions for various operand sizes.
static DispatcherX86Ptr promote(const BaseSemantics::DispatcherPtr &)
Dynamic cast to a DispatcherX86Ptr with assertion.
RegisterDescriptor REG_R14
Cached register.
RegisterDescriptor REG_EBP
Cached register.
RegisterDescriptor REG_CF
Cached register.
RegisterDescriptor REG_FPSTATUS_TOP
Cached register.
void processorMode(X86InstructionSize m)
CPU mode of operation.
virtual BaseSemantics::SValuePtr invertMaybe(const BaseSemantics::SValuePtr &value, bool maybe)
Conditionally invert the bits of value.
RegisterDescriptor REG_RCX
Cached register.
RegisterDescriptor REG_EFLAGS
Cached register.
virtual BaseSemantics::SValuePtr doAddOperation(BaseSemantics::SValuePtr a, BaseSemantics::SValuePtr b, bool invertCarries, const BaseSemantics::SValuePtr &carryIn)
Adds two values and adjusts flags.
RegisterDescriptor REG_RSP
Cached register.
RegisterDescriptor REG_anySP
Cached register.
RegisterDescriptor REG_BH
Cached register.
RegisterDescriptor REG_IP
Cached register.
virtual void repLeave(X86RepeatPrefix, const BaseSemantics::SValuePtr &in_loop, rose_addr_t insn_va, bool honorZeroFlag)
Leave a loop for a REP-, REPE-, or REPNE-prefixed instruction.
RegisterDescriptor REG_RBX
Cached register.
virtual BaseSemantics::SValuePtr readRegister(RegisterDescriptor, AccessMode mode=READ_REGISTER)
Architecture-specific read from register.
RegisterDescriptor REG_AL
Cached register.
RegisterDescriptor REG_DF
Cached register.
RegisterDescriptor REG_BL
Cached register.
RegisterDescriptor REG_anyAX
Cached register.
virtual BaseSemantics::DispatcherPtr create(const BaseSemantics::RiscOperatorsPtr &) const override
Virtual constructor.
RegisterDescriptor REG_DH
Cached register.
virtual BaseSemantics::SValuePtr flagsCombo(X86InstructionKind k)
Return a Boolean for the specified flag combo for an instruction.
RegisterDescriptor REG_SS
Cached register.
RegisterDescriptor REG_RIP
Cached register.
virtual int iprocKey(SgAsmInstruction *insn_) const override
Given an instruction, return the InsnProcessor key that can be used as an index into the iproc_table.
virtual RegisterDescriptor stackFrameRegister() const override
Returns the stack call frame register.
virtual BaseSemantics::SValuePtr saturateUnsignedToUnsigned(const BaseSemantics::SValuePtr &, size_t narrowerWidth)
Convert an unsigned value to a narrower unsigned type.
RegisterDescriptor REG_RFLAGS
Cached register.
virtual BaseSemantics::SValuePtr doIncOperation(const BaseSemantics::SValuePtr &a, bool dec, bool setCarry)
Increments or decrements a value and adjusts flags.
RegisterDescriptor REG_ZF
Cached register.
virtual void writeRegister(RegisterDescriptor, const BaseSemantics::SValuePtr &result)
Architecture-specific write to register.
RegisterDescriptor REG_FPSTATUS
Cached register.
RegisterDescriptor REG_BP
Cached register.
RegisterDescriptor REG_anySI
Cached register.
RegisterDescriptor REG_DL
Cached register.
RegisterDescriptor REG_MXCSR
Cached register.
virtual BaseSemantics::SValuePtr doAddOperation(BaseSemantics::SValuePtr a, BaseSemantics::SValuePtr b, bool invertCarries, const BaseSemantics::SValuePtr &carryIn, const BaseSemantics::SValuePtr &cond)
Adds two values and adjusts flags.
RegisterDescriptor REG_R9
Cached register.
virtual void setFlagsForResult(const BaseSemantics::SValuePtr &result)
Set parity, sign, and zero flags appropriate for result value.
X86InstructionSize processorMode() const
CPU mode of operation.
RegisterDescriptor REG_BX
Cached register.
RegisterDescriptor REG_anyBX
Cached register.
virtual BaseSemantics::SValuePtr saturateSignedToUnsigned(const BaseSemantics::SValuePtr &, size_t narrowerWidth)
Convert a signed value to a narrower unsigned type.
virtual BaseSemantics::SValuePtr parity(const BaseSemantics::SValuePtr &v)
Returns true if byte v has an even number of bits set; false for an odd number.
void iproc_init()
Loads the iproc table with instruction processing functors.
RegisterDescriptor REG_CH
Cached register.
RegisterDescriptor REG_ST0
Cached register.
BaseSemantics::Dispatcher Super
Base type.
RegisterDescriptor REG_PF
Cached register.
RegisterDescriptor REG_R13
Cached register.
RegisterDescriptor REG_SP
Cached register.
RegisterDescriptor REG_anyIP
Cached register.
RegisterDescriptor REG_SF
Cached register.
RegisterDescriptor REG_RAX
Cached register.
DispatcherX86Ptr Ptr
Shared-ownership pointer.
virtual void initializeState(const BaseSemantics::StatePtr &) override
Initialize the state.
static DispatcherX86Ptr instance(const Architecture::BaseConstPtr &)
Construct a prototypical dispatcher.
void regcache_init()
Load the cached register descriptors.
RegisterDescriptor REG_RDX
Cached register.
RegisterDescriptor REG_RBP
Cached register.
RegisterDescriptor REG_anyDX
Cached register.
virtual BaseSemantics::SValuePtr doShiftOperation(X86InstructionKind kind, const BaseSemantics::SValuePtr &operand, const BaseSemantics::SValuePtr &source_bits, const BaseSemantics::SValuePtr &total_shift, size_t shiftSignificantBits)
Implements the SHR, SAR, SHL, SAL, SHRD, and SHLD instructions for various operand sizes.
virtual BaseSemantics::SValuePtr repEnter(X86RepeatPrefix)
Enters a loop for a REP-, REPE-, or REPNE-prefixed instruction.
RegisterDescriptor REG_anyFLAGS
Cached register.
virtual RegisterDictionary::RegisterDescriptors get_usual_registers() const
Get list of common registers.
RegisterDescriptor REG_ES
Cached register.
RegisterDescriptor REG_EDI
Cached register.
virtual RegisterDescriptor stackPointerRegister() const override
Returns the stack pointer register.
RegisterDescriptor REG_R10
Cached register.
RegisterDescriptor REG_ESI
Cached register.
RegisterDescriptor REG_RDI
Cached register.
virtual void write(SgAsmExpression *e, const BaseSemantics::SValuePtr &value, size_t addr_nbits=0) override
Writes to an L-value expression.
RegisterDescriptor REG_TF
Cached register.
RegisterDescriptor REG_DX
Cached register.
RegisterDescriptor REG_RSI
Cached register.
RegisterDescriptor REG_EIP
Cached register.
RegisterDescriptor REG_EAX
Cached register.
RegisterDescriptor REG_ECX
Cached register.
virtual BaseSemantics::SValuePtr greaterOrEqualToTen(const BaseSemantics::SValuePtr &value)
Determines whether value is greater than or equal to ten.
RegisterDescriptor REG_CL
Cached register.
RegisterDescriptor REG_OF
Cached register.
RegisterDescriptor REG_AH
Cached register.
RegisterDescriptor REG_R15
Cached register.
virtual void setFlagsForResult(const BaseSemantics::SValuePtr &result, const BaseSemantics::SValuePtr &cond)
Conditionally set parity, sign, and zero flags appropriate for result value.
RegisterDescriptor REG_anyDI
Cached register.
virtual void pushFloatingPoint(const BaseSemantics::SValuePtr &valueToPush)
Push floating-point value onto FP stack.
RegisterDescriptor REG_R12
Cached register.
RegisterDescriptor REG_anyBP
Cached register.
RegisterDescriptor REG_CX
Cached register.
RegisterDescriptor REG_FLAGS
Cached register.
RegisterDescriptor REG_R11
Cached register.
RegisterDescriptor REG_CS
Cached register.
RegisterDescriptor REG_SI
Cached register.
RegisterDescriptor REG_GS
Cached register.
virtual RegisterDescriptor instructionPointerRegister() const override
Returns the instruction pointer register.
virtual BaseSemantics::SValuePtr saturateSignedToSigned(const BaseSemantics::SValuePtr &, size_t narrowerWidth)
Convert a signed value to a narrower signed type.
Base class for all x86 instruction processors.
Describes (part of) a physical CPU register.
Rose::BinaryAnalysis::RegisterDescriptors RegisterDescriptors
List of register descriptors in dictionary.
Base class for expressions.
Base class for machine instructions.
Represents one Intel x86 machine instruction.
std::shared_ptr< const Base > BaseConstPtr
Reference counted pointer for Architecture::Base.
boost::shared_ptr< RiscOperators > RiscOperatorsPtr
Shared-ownership pointer to a RISC operators object.
boost::shared_ptr< Dispatcher > DispatcherPtr
Shared-ownership pointer to a semantics instruction dispatcher.
boost::shared_ptr< State > StatePtr
Shared-ownership pointer to a semantic state.
boost::shared_ptr< class DispatcherX86 > DispatcherX86Ptr
Shared-ownership pointer to an x86 instruction dispatcher.
X86InstructionKind
List of all x86 instructions known to the ROSE disassembler/assembler.