ROSE  0.11.101.0
DispatcherX86.h
1 #ifndef ROSE_BinaryAnalysis_InstructionSemantics_DispatcherX86_H
2 #define ROSE_BinaryAnalysis_InstructionSemantics_DispatcherX86_H
3 #include <featureTests.h>
4 #ifdef ROSE_ENABLE_BINARY_ANALYSIS
5 
6 #include <Rose/BinaryAnalysis/BasicTypes.h>
7 #include <Rose/BinaryAnalysis/InstructionSemantics/BaseSemantics.h>
8 
9 #include <boost/serialization/access.hpp>
10 #include <boost/serialization/base_object.hpp>
11 #include <boost/serialization/export.hpp>
12 #include <boost/serialization/split_member.hpp>
13 
14 namespace Rose {
15 namespace BinaryAnalysis {
16 namespace InstructionSemantics {
17 
18 
20 // Dispatcher
22 
24 typedef boost::shared_ptr<class DispatcherX86> DispatcherX86Ptr;
25 
27 public:
30 
33 
34 protected:
35  X86InstructionSize processorMode_;
36 
37 public:
52 
55 
60 
62 
65 
69 #ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
70 private:
71  friend class boost::serialization::access;
72 
73  template<class S>
74  void save(S &s, const unsigned /*version*/) const {
75  s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Super);
76  s & BOOST_SERIALIZATION_NVP(processorMode_);
77  }
78 
79  template<class S>
80  void load(S &s, const unsigned /*version*/) {
81  s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Super);
82  s & BOOST_SERIALIZATION_NVP(processorMode_);
83  regcache_init();
84  iproc_init();
85  memory_init();
86  }
87 
88  BOOST_SERIALIZATION_SPLIT_MEMBER();
89 #endif
90 
91 protected:
92  // Prototypical constructor
93  DispatcherX86();
94 
95  // Prototypical constructor
96  DispatcherX86(size_t addrWidth, const RegisterDictionaryPtr &regs);
97 
98  // Normal constructor
99  DispatcherX86(const BaseSemantics::RiscOperatorsPtr&, size_t addrWidth, const RegisterDictionaryPtr&);
100 
101 public:
102  ~DispatcherX86();
103 
105  void iproc_init();
106 
110  void regcache_init();
111 
113  void memory_init();
114 
115 public:
118  static DispatcherX86Ptr instance();
119 
122  static DispatcherX86Ptr instance(size_t addrWidth, const RegisterDictionaryPtr&);
123 
125  static DispatcherX86Ptr instance(const BaseSemantics::RiscOperatorsPtr &ops, size_t addrWidth,
126  const RegisterDictionaryPtr&);
127 
130  const RegisterDictionaryPtr&) const override;
131 
133  static DispatcherX86Ptr promote(const BaseSemantics::DispatcherPtr&);
134 
138  X86InstructionSize processorMode() const { return processorMode_; }
139  void processorMode(X86InstructionSize m) { processorMode_ = m; }
142  virtual void set_register_dictionary(const RegisterDictionaryPtr &regdict) override;
143 
147 
148  virtual RegisterDescriptor instructionPointerRegister() const override;
149  virtual RegisterDescriptor stackPointerRegister() const override;
150  virtual RegisterDescriptor stackFrameRegister() const override;
151  virtual RegisterDescriptor callReturnRegister() const override;
152 
153  virtual int iprocKey(SgAsmInstruction *insn_) const override {
154  SgAsmX86Instruction *insn = isSgAsmX86Instruction(insn_);
155  assert(insn!=NULL);
156  return insn->get_kind();
157  }
158 
159  virtual void write(SgAsmExpression *e, const BaseSemantics::SValuePtr &value, size_t addr_nbits=0) override;
160 
161  virtual void initializeState(const BaseSemantics::StatePtr&) override;
162 
163  enum AccessMode { READ_REGISTER, PEEK_REGISTER };
164 
168  virtual BaseSemantics::SValuePtr readRegister(RegisterDescriptor, AccessMode mode = READ_REGISTER);
169 
174  virtual void writeRegister(RegisterDescriptor, const BaseSemantics::SValuePtr &result);
175 
177  virtual void setFlagsForResult(const BaseSemantics::SValuePtr &result);
178 
180  virtual void setFlagsForResult(const BaseSemantics::SValuePtr &result, const BaseSemantics::SValuePtr &cond);
181 
184 
186  virtual BaseSemantics::SValuePtr invertMaybe(const BaseSemantics::SValuePtr &value, bool maybe);
187 
190 
192  virtual BaseSemantics::SValuePtr flagsCombo(X86InstructionKind k);
193 
196  virtual BaseSemantics::SValuePtr repEnter(X86RepeatPrefix);
197 
205  virtual void repLeave(X86RepeatPrefix, const BaseSemantics::SValuePtr &in_loop, rose_addr_t insn_va, bool honorZeroFlag);
206 
211  bool invertCarries, const BaseSemantics::SValuePtr &carryIn);
213  bool invertCarries, const BaseSemantics::SValuePtr &carryIn,
214  const BaseSemantics::SValuePtr &cond);
219  virtual BaseSemantics::SValuePtr doIncOperation(const BaseSemantics::SValuePtr &a, bool dec, bool setCarry);
220 
224  virtual BaseSemantics::SValuePtr doRotateOperation(X86InstructionKind kind,
225  const BaseSemantics::SValuePtr &operand,
226  const BaseSemantics::SValuePtr &total_rotate,
227  size_t rotateSignificantBits);
228 
234  virtual BaseSemantics::SValuePtr doShiftOperation(X86InstructionKind kind,
235  const BaseSemantics::SValuePtr &operand,
236  const BaseSemantics::SValuePtr &source_bits,
237  const BaseSemantics::SValuePtr &total_shift,
238  size_t shiftSignificantBits);
239 
243  virtual void pushFloatingPoint(const BaseSemantics::SValuePtr &valueToPush);
244 
246  virtual BaseSemantics::SValuePtr readFloatingPointStack(size_t position);
247 
249  virtual void popFloatingPoint();
250 
253 
256  virtual BaseSemantics::SValuePtr saturateSignedToUnsigned(const BaseSemantics::SValuePtr&, size_t narrowerWidth);
257 
261  virtual BaseSemantics::SValuePtr saturateSignedToSigned(const BaseSemantics::SValuePtr&, size_t narrowerWidth);
262 
266 };
267 
269 // Instruction processors
271 
272 namespace X86 {
273 
281 public:
282  typedef DispatcherX86 *D;
284  typedef SgAsmX86Instruction *I;
285  typedef const SgAsmExpressionPtrList &A;
286  virtual void p(D, Ops, I, A) = 0;
287  virtual void process(const BaseSemantics::DispatcherPtr&, SgAsmInstruction*) override;
288  virtual void assert_args(I insn, A args, size_t nargs);
289  void check_arg_width(D d, I insn, A args);
290 };
291 
292 } // namespace
293 
294 } // namespace
295 } // namespace
296 } // namespace
297 
298 #ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
300 #endif
301 
302 #endif
303 #endif
virtual void pushFloatingPoint(const BaseSemantics::SValuePtr &valueToPush)
Push floating-point value onto FP stack.
virtual int iprocKey(SgAsmInstruction *insn_) const override
Given an instruction, return the InsnProcessor key that can be used as an index into the iproc_table...
virtual BaseSemantics::SValuePtr greaterOrEqualToTen(const BaseSemantics::SValuePtr &value)
Determines whether value is greater than or equal to ten.
virtual BaseSemantics::SValuePtr doRotateOperation(X86InstructionKind kind, const BaseSemantics::SValuePtr &operand, const BaseSemantics::SValuePtr &total_rotate, size_t rotateSignificantBits)
Implements the RCL, RCR, ROL, and ROR instructions for various operand sizes.
RegisterDescriptor REG_FPSTATUS
Cached register.
Definition: DispatcherX86.h:66
boost::shared_ptr< RiscOperators > RiscOperatorsPtr
Shared-ownership pointer to a RISC operators object.
Base class for machine instructions.
void regcache_init()
Load the cached register descriptors.
virtual BaseSemantics::SValuePtr parity(const BaseSemantics::SValuePtr &v)
Returns true if byte v has an even number of bits set; false for an odd number.
virtual BaseSemantics::SValuePtr saturateUnsignedToUnsigned(const BaseSemantics::SValuePtr &, size_t narrowerWidth)
Convert an unsigned value to a narrower unsigned type.
Main namespace for the ROSE library.
virtual void setFlagsForResult(const BaseSemantics::SValuePtr &result)
Set parity, sign, and zero flags appropriate for result value.
virtual BaseSemantics::SValuePtr doAddOperation(BaseSemantics::SValuePtr a, BaseSemantics::SValuePtr b, bool invertCarries, const BaseSemantics::SValuePtr &carryIn)
Adds two values and adjusts flags.
virtual void writeRegister(RegisterDescriptor, const BaseSemantics::SValuePtr &result)
Architecture-specific write to register.
virtual RegisterDictionary::RegisterDescriptors get_usual_registers() const
Get list of common registers.
boost::shared_ptr< State > StatePtr
Shared-ownership pointer to a semantic state.
virtual void repLeave(X86RepeatPrefix, const BaseSemantics::SValuePtr &in_loop, rose_addr_t insn_va, bool honorZeroFlag)
Leave a loop for a REP-, REPE-, or REPNE-prefixed instruction.
boost::shared_ptr< Dispatcher > DispatcherPtr
Shared-ownership pointer to a semantics instruction dispatcher.
static DispatcherX86Ptr promote(const BaseSemantics::DispatcherPtr &)
Dynamic cast to a DispatcherX86Ptr with assertion.
Dispatches instructions through the RISC layer.
Definition: Dispatcher.h:44
Base class for all x86 instruction processors.
Rose::BinaryAnalysis::RegisterDescriptors RegisterDescriptors
List of register descriptors in dictionary.
virtual void write(SgAsmExpression *e, const BaseSemantics::SValuePtr &value, size_t addr_nbits=0) override
Writes to an L-value expression.
RegisterDescriptor REG_RFLAGS
Cached register.
Definition: DispatcherX86.h:63
RegisterDescriptor REG_EFLAGS
Cached register.
Definition: DispatcherX86.h:63
void processorMode(X86InstructionSize m)
CPU mode of operation.
Functor that knows how to dispatch a single kind of instruction.
Definition: Dispatcher.h:25
void iproc_init()
Loads the iproc table with instruction processing functors.
Describes (part of) a physical CPU register.
virtual BaseSemantics::SValuePtr repEnter(X86RepeatPrefix)
Enters a loop for a REP-, REPE-, or REPNE-prefixed instruction.
virtual BaseSemantics::SValuePtr saturateSignedToSigned(const BaseSemantics::SValuePtr &, size_t narrowerWidth)
Convert a signed value to a narrower signed type.
virtual BaseSemantics::SValuePtr saturateSignedToUnsigned(const BaseSemantics::SValuePtr &, size_t narrowerWidth)
Convert a signed value to a narrower unsigned type.
X86InstructionSize processorMode() const
CPU mode of operation.
DispatcherX86Ptr Ptr
Shared-ownership pointer.
Definition: DispatcherX86.h:32
Represents one Intel x86 machine instruction.
virtual void popFloatingPoint()
Pop the top item from the floating point stack.
virtual BaseSemantics::SValuePtr fixMemoryAddress(const BaseSemantics::SValuePtr &address) const
Extend or truncate value to propert memory address width.
Base class for expressions.
Binary analysis.
RegisterDescriptor REG_anyFLAGS
Cached register.
Definition: DispatcherX86.h:63
void memory_init()
Make sure memory properties are set up correctly.
virtual RegisterDescriptor stackPointerRegister() const override
Returns the stack pointer register.
RegisterDescriptor REG_FPSTATUS_TOP
Cached register.
Definition: DispatcherX86.h:66
virtual RegisterDescriptor callReturnRegister() const override
Returns the function call return address register.
virtual RegisterDescriptor stackFrameRegister() const override
Returns the stack call frame register.
virtual BaseSemantics::SValuePtr readRegister(RegisterDescriptor, AccessMode mode=READ_REGISTER)
Architecture-specific read from register.
virtual BaseSemantics::SValuePtr doIncOperation(const BaseSemantics::SValuePtr &a, bool dec, bool setCarry)
Increments or decrements a value and adjusts flags.
Rose::BinaryAnalysis::X86InstructionKind get_kind() const
Property: Instruction kind.
virtual void initializeState(const BaseSemantics::StatePtr &) override
Initialize the state.
virtual BaseSemantics::SValuePtr doShiftOperation(X86InstructionKind kind, const BaseSemantics::SValuePtr &operand, const BaseSemantics::SValuePtr &source_bits, const BaseSemantics::SValuePtr &total_shift, size_t shiftSignificantBits)
Implements the SHR, SAR, SHL, SAL, SHRD, and SHLD instructions for various operand sizes...
Base class for most instruction semantics RISC operators.
Definition: RiscOperators.h:48
virtual BaseSemantics::SValuePtr invertMaybe(const BaseSemantics::SValuePtr &value, bool maybe)
Conditionally invert the bits of value.
virtual BaseSemantics::SValuePtr readFloatingPointStack(size_t position)
Read a value from the floating point stack.
static DispatcherX86Ptr instance()
Construct a prototypical dispatcher.
RegisterDictionaryPtr regdict
See registerDictionary property.
Definition: Dispatcher.h:53
virtual BaseSemantics::DispatcherPtr create(const BaseSemantics::RiscOperatorsPtr &, size_t addrWidth, const RegisterDictionaryPtr &) const override
Virtual constructor.
boost::shared_ptr< class DispatcherX86 > DispatcherX86Ptr
Shared-ownership pointer to an x86 instruction dispatcher.
Definition: DispatcherX86.h:24
virtual RegisterDescriptor instructionPointerRegister() const override
Returns the instruction pointer register.
virtual BaseSemantics::SValuePtr flagsCombo(X86InstructionKind k)
Return a Boolean for the specified flag combo for an instruction.