Description
Definition at line 27 of file DispatcherPowerpc.h.
Public Types | |
| typedef BaseSemantics::Dispatcher | Super |
 Public Types inherited from Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | |
| typedef DispatcherPtr | Ptr |
| Shared-ownership pointer for a Dispatcher object. More... | |
Public Member Functions | |
| virtual BaseSemantics::DispatcherPtr | create (const BaseSemantics::RiscOperatorsPtr &ops, size_t addrWidth=0, const RegisterDictionary *regs=NULL) const ROSE_OVERRIDE |
| Virtual constructor. More... | |
| virtual void | set_register_dictionary (const RegisterDictionary *regdict) ROSE_OVERRIDE |
| Access the register dictionary. More... | |
| virtual RegisterDescriptor | instructionPointerRegister () const ROSE_OVERRIDE |
| Returns the instruction pointer register. More... | |
| virtual RegisterDescriptor | stackPointerRegister () const ROSE_OVERRIDE |
| Returns the stack pointer register. More... | |
| virtual RegisterDescriptor | callReturnRegister () const ROSE_OVERRIDE |
| Returns the function call return address register. More... | |
| virtual int | iproc_key (SgAsmInstruction *insn_) const ROSE_OVERRIDE |
| Given an instruction, return the InsnProcessor key that can be used as an index into the iproc_table. More... | |
| void | setXerOverflow (const BaseSemantics::SValuePtr &hadOverflow) |
| Set the XER OV and SO bits as specified. More... | |
| virtual void | updateCr0 (const BaseSemantics::SValuePtr &result) |
| Write status flags for result. More... | |
| BaseSemantics::SValuePtr | readAndUpdate (BaseSemantics::RiscOperators *, SgAsmExpression *, size_t valueNBits) |
| Reads from a memory address and updates a register with the effective address that was read. More... | |
| void | writeAndUpdate (BaseSemantics::RiscOperators *, SgAsmExpression *destination, const BaseSemantics::SValuePtr &value) |
| Writes a value to a memory address and updates a register with the effective address to which the value was written. More... | |
| Public Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | |
| virtual void | processInstruction (SgAsmInstruction *insn) |
| Process a single instruction. More... | |
| virtual InsnProcessor * | iproc_lookup (SgAsmInstruction *insn) |
| Lookup the processor for an instruction. More... | |
| virtual void | iproc_replace (SgAsmInstruction *insn, InsnProcessor *iproc) |
| Replace an instruction processor with another. More... | |
| virtual void | iproc_set (int key, InsnProcessor *iproc) |
| Set an iproc table entry to the specified value. More... | |
| virtual InsnProcessor * | iproc_get (int key) |
| Obtain an iproc table entry for the specified key. More... | |
| virtual RiscOperatorsPtr | get_operators () const |
| Get a pointer to the RISC operators object. More... | |
| virtual StatePtr | currentState () const |
| Get a pointer to the state object. More... | |
| virtual SValuePtr | protoval () const |
| Return the prototypical value. More... | |
| virtual SgAsmInstruction * | currentInstruction () const |
| Returns the instruction that is being processed. More... | |
| virtual SValuePtr | number_ (size_t nbits, uint64_t number) const |
| Return a semantic value representing a number. More... | |
| virtual RegisterDescriptor | findRegister (const std::string ®name, size_t nbits=0, bool allowMissing=false) const |
| Lookup a register by name. More... | |
| virtual void | advanceInstructionPointer (SgAsmInstruction *) |
| Update the instruction pointer register. More... | |
| virtual RegisterDescriptor | segmentRegister (SgAsmMemoryReferenceExpression *) |
| Returns a register descriptor for the segment part of a memory reference expression. More... | |
| virtual void | incrementRegisters (SgAsmExpression *) |
| Increment all auto-increment registers in the expression. More... | |
| virtual void | decrementRegisters (SgAsmExpression *) |
| Decrement all auto-decrement registers in the expression. More... | |
| virtual SValuePtr | effectiveAddress (SgAsmExpression *, size_t nbits=0) |
| Returns a memory address by evaluating the address expression. More... | |
| virtual SValuePtr | read (SgAsmExpression *, size_t value_nbits=0, size_t addr_nbits=0) |
| Reads an R-value expression. More... | |
| virtual void | write (SgAsmExpression *, const SValuePtr &value, size_t addr_nbits=0) |
| Writes to an L-value expression. More... | |
| virtual SValuePtr | undefined_ (size_t nbits) const |
| Return a new undefined semantic value. | |
| virtual SValuePtr | unspecified_ (size_t nbits) const |
| Return a new undefined semantic value. | |
| virtual const RegisterDictionary * | get_register_dictionary () const |
| Access the register dictionary. More... | |
| size_t | addressWidth () const |
| Property: Width of memory addresses. More... | |
| void | addressWidth (size_t nbits) |
| Property: Width of memory addresses. More... | |
| bool | autoResetInstructionPointer () const |
| Property: Reset instruction pointer register for each instruction. More... | |
| void | autoResetInstructionPointer (bool b) |
| Property: Reset instruction pointer register for each instruction. More... | |
Static Public Member Functions | |
| static DispatcherPowerpcPtr | instance () |
| Construct a prototypical dispatcher. More... | |
| static DispatcherPowerpcPtr | instance (size_t addrWidth, const RegisterDictionary *regs=NULL) |
| Constructor. More... | |
| static DispatcherPowerpcPtr | instance (const BaseSemantics::RiscOperatorsPtr &ops, size_t addrWidth, const RegisterDictionary *regs=NULL) |
| Constructor. More... | |
| static DispatcherPowerpcPtr | promote (const BaseSemantics::DispatcherPtr &d) |
| Dynamic cast to a DispatcherPowerpcPtr with assertion. More... | |
Public Attributes | |
| RegisterDescriptor | REG_IAR |
| Cached register. More... | |
| RegisterDescriptor | REG_LR |
| Cached register. More... | |
| RegisterDescriptor | REG_XER |
| Cached register. More... | |
| RegisterDescriptor | REG_XER_CA |
| Cached register. More... | |
| RegisterDescriptor | REG_XER_OV |
| Cached register. More... | |
| RegisterDescriptor | REG_XER_SO |
| Cached register. More... | |
| RegisterDescriptor | REG_CTR |
| Cached register. More... | |
| RegisterDescriptor | REG_CR |
| Cached register. More... | |
| RegisterDescriptor | REG_CR0 |
| Cached register. More... | |
| RegisterDescriptor | REG_CR0_LT |
| Cached register. More... | |
Protected Member Functions | |
| DispatcherPowerpc (size_t addrWidth, const RegisterDictionary *regs) | |
| DispatcherPowerpc (const BaseSemantics::RiscOperatorsPtr &ops, size_t addrWidth, const RegisterDictionary *regs) | |
| void | iproc_init () |
| Loads the iproc table with instruction processing functors. More... | |
| void | regcache_init () |
| Load the cached register descriptors. More... | |
| void | memory_init () |
| Make sure memory is set up correctly. More... | |
| Protected Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | |
| Dispatcher (size_t addrWidth, const RegisterDictionary *regs) | |
| Dispatcher (const RiscOperatorsPtr &ops, size_t addrWidth, const RegisterDictionary *regs) | |
Additional Inherited Members | |
| Protected Types inherited from Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | |
| typedef std::vector< InsnProcessor * > | InsnProcessors |
| Protected Attributes inherited from Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher | |
| RiscOperatorsPtr | operators |
| const RegisterDictionary * | regdict |
| See set_register_dictionary(). More... | |
| size_t | addrWidth_ |
| Width of memory addresses in bits. More... | |
| bool | autoResetInstructionPointer_ |
| Reset instruction pointer register for each instruction. More... | |
| InsnProcessors | iproc_table |
Member Function Documentation
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protected |
Loads the iproc table with instruction processing functors.
This normally happens from the constructor.
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protected |
Load the cached register descriptors.
This happens at construction and on set_register_dictionary() calls.
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protected |
Make sure memory is set up correctly.
For instance, byte order should be little endian.
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inlinestatic |
Construct a prototypical dispatcher.
The only thing this dispatcher can be used for is to create another dispatcher with the virtual create method.
Definition at line 86 of file DispatcherPowerpc.h.
Referenced by create().
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inlinestatic |
Constructor.
Definition at line 91 of file DispatcherPowerpc.h.
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inlinestatic |
Constructor.
Definition at line 96 of file DispatcherPowerpc.h.
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inlinevirtual |
Virtual constructor.
Implements Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher.
Definition at line 102 of file DispatcherPowerpc.h.
References Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher::addressWidth(), Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher::get_register_dictionary(), and instance().
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inlinestatic |
Dynamic cast to a DispatcherPowerpcPtr with assertion.
Definition at line 112 of file DispatcherPowerpc.h.
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virtual |
Access the register dictionary.
The register dictionary defines the set of registers over which the RISC operators may operate. This should be same registers (or superset thereof) whose values are stored in the machine state(s). This dictionary is used by the Dispatcher class to translate register names to register descriptors. For instance, to read from the "eax" register, the dispatcher will look up "eax" in its register dictionary and then pass that descriptor to the RiscOperators::readRegister operation. Register descriptors are also stored in instructions when the instruction is disassembled, so the dispatcher should probably be using the same registers as the disassembler, or a superset thereof.
The register dictionary should not be changed after a dispatcher is instantiated because the dispatcher's constructor may query the dictionary and cache the resultant register descriptors.
Reimplemented from Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher.
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virtual |
Returns the instruction pointer register.
Implements Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher.
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virtual |
Returns the stack pointer register.
Implements Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher.
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virtual |
Returns the function call return address register.
Implements Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher.
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inlinevirtual |
Given an instruction, return the InsnProcessor key that can be used as an index into the iproc_table.
Implements Rose::BinaryAnalysis::InstructionSemantics2::BaseSemantics::Dispatcher.
Definition at line 124 of file DispatcherPowerpc.h.
References SgAsmPowerpcInstruction::get_kind().
| void Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc::setXerOverflow | ( | const BaseSemantics::SValuePtr & | hadOverflow | ) |
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virtual |
Write status flags for result.
| BaseSemantics::SValuePtr Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc::readAndUpdate | ( | BaseSemantics::RiscOperators * | , |
| SgAsmExpression * | , | ||
| size_t | valueNBits | ||
| ) |
Reads from a memory address and updates a register with the effective address that was read.
The address expression must be a binary add operation whose first argument is a register, and it is this register that gets updated.
| void Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc::writeAndUpdate | ( | BaseSemantics::RiscOperators * | , |
| SgAsmExpression * | destination, | ||
| const BaseSemantics::SValuePtr & | value | ||
| ) |
Writes a value to a memory address and updates a register with the effective address to which the value was written.
The address expression must be a binary add operation whose first argument is a register, and it is this register that gets updated.
Member Data Documentation
| RegisterDescriptor Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc::REG_IAR |
Cached register.
This register is cached so that there are not so many calls to Dispatcher::findRegister(). The register descriptor is updated only when the register dictionary is changed (see set_register_dictionary()).
Definition at line 34 of file DispatcherPowerpc.h.
| RegisterDescriptor Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc::REG_LR |
Cached register.
This register is cached so that there are not so many calls to Dispatcher::findRegister(). The register descriptor is updated only when the register dictionary is changed (see set_register_dictionary()).
Definition at line 34 of file DispatcherPowerpc.h.
| RegisterDescriptor Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc::REG_XER |
Cached register.
This register is cached so that there are not so many calls to Dispatcher::findRegister(). The register descriptor is updated only when the register dictionary is changed (see set_register_dictionary()).
Definition at line 34 of file DispatcherPowerpc.h.
| RegisterDescriptor Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc::REG_XER_CA |
Cached register.
This register is cached so that there are not so many calls to Dispatcher::findRegister(). The register descriptor is updated only when the register dictionary is changed (see set_register_dictionary()).
Definition at line 34 of file DispatcherPowerpc.h.
| RegisterDescriptor Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc::REG_XER_OV |
Cached register.
This register is cached so that there are not so many calls to Dispatcher::findRegister(). The register descriptor is updated only when the register dictionary is changed (see set_register_dictionary()).
Definition at line 34 of file DispatcherPowerpc.h.
| RegisterDescriptor Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc::REG_XER_SO |
Cached register.
This register is cached so that there are not so many calls to Dispatcher::findRegister(). The register descriptor is updated only when the register dictionary is changed (see set_register_dictionary()).
Definition at line 34 of file DispatcherPowerpc.h.
| RegisterDescriptor Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc::REG_CTR |
Cached register.
This register is cached so that there are not so many calls to Dispatcher::findRegister(). The register descriptor is updated only when the register dictionary is changed (see set_register_dictionary()).
Definition at line 34 of file DispatcherPowerpc.h.
| RegisterDescriptor Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc::REG_CR |
Cached register.
This register is cached so that there are not so many calls to Dispatcher::findRegister(). The register descriptor is updated only when the register dictionary is changed (see set_register_dictionary()).
Definition at line 35 of file DispatcherPowerpc.h.
| RegisterDescriptor Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc::REG_CR0 |
Cached register.
This register is cached so that there are not so many calls to Dispatcher::findRegister(). The register descriptor is updated only when the register dictionary is changed (see set_register_dictionary()).
Definition at line 35 of file DispatcherPowerpc.h.
| RegisterDescriptor Rose::BinaryAnalysis::InstructionSemantics2::DispatcherPowerpc::REG_CR0_LT |
Cached register.
This register is cached so that there are not so many calls to Dispatcher::findRegister(). The register descriptor is updated only when the register dictionary is changed (see set_register_dictionary()).
Definition at line 35 of file DispatcherPowerpc.h.
The documentation for this class was generated from the following file:
