Disassembler/M68k.h

/* Disassembly specific to Motorola architectures */
#ifndef ROSE_BinaryAnalysis_Disassembler_M68k_H
#define ROSE_BinaryAnalysis_Disassembler_M68k_H
#include <featureTests.h>
#ifdef ROSE_ENABLE_BINARY_ANALYSIS
#include <Rose/BinaryAnalysis/Disassembler/Base.h>
 
#include <Rose/BinaryAnalysis/Architecture/BasicTypes.h>
#include <Rose/BinaryAnalysis/InstructionEnumsM68k.h>
#include "BitPattern.h"
 
#include <boost/serialization/access.hpp>
#include <boost/serialization/base_object.hpp>
#include <boost/serialization/export.hpp>
#include <boost/serialization/split_member.hpp>
 
namespace Rose {
namespace BinaryAnalysis {
namespace Disassembler {
 
class M68k: public Base {
public:
    using Ptr = M68kPtr;
 
    // State mutated during the call to disassembleOne. Used internally.
    struct State: boost::noncopyable { // noncopyable is so we don't accidentally pass it by value
        MemoryMap::Ptr map;                         
        rose_addr_t insn_va;                        
        uint16_t    iwords[11];                     
        size_t      niwords;                        
        size_t      niwords_used;                   
        State()
            : insn_va(0), niwords(0), niwords_used(0) {}
    };
 
public:
    class Decoder {
    public:
        Decoder(const std::string &name, unsigned family, const BitPattern<uint16_t> &pattern)
            : name(name), family(family), pattern(pattern) {}
        virtual ~Decoder() {}
        std::string name;                               // for debugging; same as class name but without the "M68k_" prefix
        unsigned family;                                // bitmask of M68kFamily bits
        BitPattern<uint16_t> pattern;                   // bits that match
        typedef M68k D;
        virtual SgAsmM68kInstruction *operator()(State&, const D *d, unsigned w0) = 0;
    };
 
private:
    M68kFamily  family;                         
    // The instruction disassembly table is an array indexed by the high-order nybble of the first 16-bit word of the
    // instruction's pattern, the so-called "operator" bits. Since most instruction disassembler have invariant operator
    // bits, we can divide the table into 16 entries for these invariant bits, and another entry (index 16) for the cases
    // with a variable operator byte.  Each of these 17 buckets is an unordered list of instruction disassemblers whose
    // patterns we attempt to match one at a time (the insertion function checks that there are no ambiguities).
    typedef std::list<Decoder*> IdisList;
    typedef std::vector<IdisList> IdisTable;
    IdisTable idis_table;
 
#ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
private:
    friend class boost::serialization::access;
 
    template<class S>
    void serialize_common(S &s, const unsigned /*version*/) {
        s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Base);
        s & BOOST_SERIALIZATION_NVP(family);
        //s & idis_table; -- not saved
    }
 
    template<class S>
    void save(S &s, const unsigned version) const {
        serialize_common(s, version);
    }
 
    template<class S>
    void load(S &s, const unsigned version) {
        serialize_common(s, version);
        init();
    }
 
    BOOST_SERIALIZATION_SPLIT_MEMBER();
#endif
 
protected:
    // undocumented constructor for serialization. The init() will be called by the serialization.
    explicit M68k(const Architecture::BaseConstPtr&);
 
    M68k(const Architecture::BaseConstPtr&, M68kFamily family);
 
public:
    static Ptr instance(const Architecture::BaseConstPtr&, M68kFamily);
 
    virtual Base::Ptr clone() const override;
    virtual SgAsmInstruction *disassembleOne(const MemoryMap::Ptr&, rose_addr_t start_va,
                                             AddressSet *successors = nullptr) override;
    virtual SgAsmInstruction *makeUnknownInstruction(const Exception&) override;
 
    typedef std::pair<SgAsmExpression*, SgAsmExpression*> ExpressionPair;
 
    Decoder* find_idis(uint16_t *insn_bytes, size_t nbytes) const;
 
    void insert_idis(Decoder*);
 
    void start_instruction(State &state, const MemoryMap::Ptr &map, rose_addr_t start_va) const{
        state.map = map;
        state.insn_va = start_va;
        state.niwords = 0;
        memset(state.iwords, 0, sizeof state.iwords);
        state.niwords_used = 0;
    }
 
    uint16_t instructionWord(State&, size_t n) const;
 
    size_t extensionWordsUsed(State&) const;
 
    SgAsmType *makeType(State&, M68kDataFormat) const;
 
    SgAsmRegisterReferenceExpression *makeDataRegister(State&, unsigned regnum, M68kDataFormat, size_t bit_offset=0) const;
 
    SgAsmRegisterReferenceExpression *makeAddressRegister(State&, unsigned regnum, M68kDataFormat, size_t bit_offset=0) const;
 
    SgAsmMemoryReferenceExpression *makeAddressRegisterPreDecrement(State&, unsigned regnum, M68kDataFormat fmt) const;
 
    SgAsmMemoryReferenceExpression *makeAddressRegisterPostIncrement(State&, unsigned regnum, M68kDataFormat fmt) const;
 
    SgAsmRegisterReferenceExpression *makeDataAddressRegister(State&, unsigned regnum, M68kDataFormat fmt,
                                                              size_t bit_offset=0) const;
 
    SgAsmRegisterNames *makeRegistersFromMask(State&, unsigned mask, M68kDataFormat fmt, bool reverse=false) const;
 
    SgAsmRegisterNames *makeFPRegistersFromMask(State&, unsigned mask, M68kDataFormat fmt, bool reverse=false) const;
 
    SgAsmRegisterReferenceExpression *makeStatusRegister(State&) const;
 
    SgAsmRegisterReferenceExpression *makeConditionCodeRegister(State&) const;
 
    SgAsmRegisterReferenceExpression* makeColdFireControlRegister(State&, unsigned regnum) const;
 
    SgAsmRegisterReferenceExpression *makeProgramCounter(State&) const;
 
    SgAsmRegisterReferenceExpression *makeMacRegister(State&, M68kMacRegister) const;
 
    SgAsmRegisterReferenceExpression *makeMacAccumulatorRegister(State&, unsigned accumIndex) const;
 
    SgAsmRegisterReferenceExpression *makeFPRegister(State&, unsigned regnum) const;
 
    SgAsmRegisterReferenceExpression *makeRegister(RegisterDescriptor) const;
 
    SgAsmIntegerValueExpression *makeImmediateValue(State&, M68kDataFormat fmt, unsigned value) const;
 
    SgAsmIntegerValueExpression *makeImmediateExtension(State&, M68kDataFormat fmt, size_t ext_word_idx) const;
 
    SgAsmExpression *makeEffectiveAddress(State&, unsigned modreg, M68kDataFormat fmt, size_t ext_offset) const;
    SgAsmExpression *makeEffectiveAddress(State&, unsigned mode, unsigned reg, M68kDataFormat fmt, size_t ext_offset) const;
    SgAsmExpression *makeAddress(State&, SgAsmExpression *expr) const;
 
    ExpressionPair makeOffsetWidthPair(State&, unsigned extension_word) const;
 
    SgAsmM68kInstruction *makeInstruction(State&, M68kInstructionKind, M68kDataFormat,
                                          SgAsmExpression *arg0=NULL, SgAsmExpression *arg1=NULL, SgAsmExpression *arg2=NULL,
                                          SgAsmExpression *arg3=NULL, SgAsmExpression *arg4=NULL, SgAsmExpression *arg5=NULL,
                                          SgAsmExpression *arg6=NULL) const;
 
    M68kFamily get_family() const { return family; }
 
private:
    void init();
};
 
} // namespace
} // namespace
} // namespace
 
#ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
BOOST_CLASS_EXPORT_KEY(Rose::BinaryAnalysis::Disassembler::M68k);
#endif
 
#endif
#endif