ROSE 0.11.145.237
Disassembler/M68k.h
1/* Disassembly specific to Motorola architectures */
2#ifndef ROSE_BinaryAnalysis_Disassembler_M68k_H
3#define ROSE_BinaryAnalysis_Disassembler_M68k_H
4#include <featureTests.h>
5#ifdef ROSE_ENABLE_BINARY_ANALYSIS
6#include <Rose/BinaryAnalysis/Disassembler/Base.h>
7
8#include <Rose/BinaryAnalysis/Architecture/BasicTypes.h>
9#include <Rose/BinaryAnalysis/InstructionEnumsM68k.h>
10#include "BitPattern.h"
11
12#ifdef ROSE_ENABLE_BOOST_SERIALIZATION
13#include <boost/serialization/access.hpp>
14#include <boost/serialization/base_object.hpp>
15#include <boost/serialization/export.hpp>
16#include <boost/serialization/split_member.hpp>
17#endif
18
19namespace Rose {
20namespace BinaryAnalysis {
21namespace Disassembler {
22
24class M68k: public Base {
25public:
27 using Ptr = M68kPtr;
28
29 // State mutated during the call to disassembleOne. Used internally.
30 struct State: boost::noncopyable { // noncopyable is so we don't accidentally pass it by value
34 size_t niwords;
35 size_t niwords_used;
37 State()
38 : insn_va(0), niwords(0), niwords_used(0) {}
39 };
40
41public:
50 class Decoder {
51 public:
52 Decoder(const std::string &name, unsigned family, const BitPattern<uint16_t> &pattern)
53 : name(name), family(family), pattern(pattern) {}
54 virtual ~Decoder() {}
55 std::string name; // for debugging; same as class name but without the "M68k_" prefix
56 unsigned family; // bitmask of M68kFamily bits
57 BitPattern<uint16_t> pattern; // bits that match
58 typedef M68k D;
59 virtual SgAsmM68kInstruction *operator()(State&, const D *d, unsigned w0) = 0;
60 };
61
62private:
63 M68kFamily family;
65 // The instruction disassembly table is an array indexed by the high-order nybble of the first 16-bit word of the
66 // instruction's pattern, the so-called "operator" bits. Since most instruction disassembler have invariant operator
67 // bits, we can divide the table into 16 entries for these invariant bits, and another entry (index 16) for the cases
68 // with a variable operator byte. Each of these 17 buckets is an unordered list of instruction disassemblers whose
69 // patterns we attempt to match one at a time (the insertion function checks that there are no ambiguities).
70 typedef std::list<Decoder*> IdisList;
71 typedef std::vector<IdisList> IdisTable;
72 IdisTable idis_table;
73
74#ifdef ROSE_ENABLE_BOOST_SERIALIZATION
75private:
76 friend class boost::serialization::access;
77
78 template<class S>
79 void serialize_common(S &s, const unsigned /*version*/) {
80 s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Base);
81 s & BOOST_SERIALIZATION_NVP(family);
82 //s & idis_table; -- not saved
83 }
84
85 template<class S>
86 void save(S &s, const unsigned version) const {
87 serialize_common(s, version);
88 }
89
90 template<class S>
91 void load(S &s, const unsigned version) {
92 serialize_common(s, version);
93 init();
94 }
95
96 BOOST_SERIALIZATION_SPLIT_MEMBER();
97#endif
98
99protected:
100 // undocumented constructor for serialization. The init() will be called by the serialization.
101 explicit M68k(const Architecture::BaseConstPtr&);
102
103 M68k(const Architecture::BaseConstPtr&, M68kFamily family);
104
105public:
114 static Ptr instance(const Architecture::BaseConstPtr&, M68kFamily);
115
116 virtual Base::Ptr clone() const override;
117 virtual SgAsmInstruction *disassembleOne(const MemoryMap::Ptr&, Address start_va, AddressSet *successors = nullptr) override;
119
120 typedef std::pair<SgAsmExpression*, SgAsmExpression*> ExpressionPair;
121
125 Decoder* find_idis(uint16_t *insn_bytes, size_t nbytes) const;
126
130
132 void start_instruction(State &state, const MemoryMap::Ptr &map, Address start_va) const{
133 state.map = map;
134 state.insn_va = start_va;
135 state.niwords = 0;
136 memset(state.iwords, 0, sizeof state.iwords);
137 state.niwords_used = 0;
138 }
139
141 uint16_t instructionWord(State&, size_t n) const;
142
144 size_t extensionWordsUsed(State&) const;
145
147 SgAsmType *makeType(State&, M68kDataFormat) const;
148
150 SgAsmRegisterReferenceExpression *makeDataRegister(State&, unsigned regnum, M68kDataFormat, size_t bit_offset=0) const;
151
153 SgAsmRegisterReferenceExpression *makeAddressRegister(State&, unsigned regnum, M68kDataFormat, size_t bit_offset=0) const;
154
157 SgAsmMemoryReferenceExpression *makeAddressRegisterPreDecrement(State&, unsigned regnum, M68kDataFormat fmt) const;
158
161 SgAsmMemoryReferenceExpression *makeAddressRegisterPostIncrement(State&, unsigned regnum, M68kDataFormat fmt) const;
162
165 SgAsmRegisterReferenceExpression *makeDataAddressRegister(State&, unsigned regnum, M68kDataFormat fmt,
166 size_t bit_offset=0) const;
167
173 SgAsmRegisterNames *makeRegistersFromMask(State&, unsigned mask, M68kDataFormat fmt, bool reverse=false) const;
174
180 SgAsmRegisterNames *makeFPRegistersFromMask(State&, unsigned mask, M68kDataFormat fmt, bool reverse=false) const;
181
184
187
190
193
196
199
204
207
209 SgAsmIntegerValueExpression *makeImmediateValue(State&, M68kDataFormat fmt, unsigned value) const;
210
212 SgAsmIntegerValueExpression *makeImmediateExtension(State&, M68kDataFormat fmt, size_t ext_word_idx) const;
213
220 SgAsmExpression *makeEffectiveAddress(State&, unsigned modreg, M68kDataFormat fmt, size_t ext_offset) const;
221 SgAsmExpression *makeEffectiveAddress(State&, unsigned mode, unsigned reg, M68kDataFormat fmt, size_t ext_offset) const;
228
231 ExpressionPair makeOffsetWidthPair(State&, unsigned extension_word) const;
232
234 SgAsmM68kInstruction *makeInstruction(State&, M68kInstructionKind, M68kDataFormat,
235 SgAsmExpression *arg0=NULL, SgAsmExpression *arg1=NULL, SgAsmExpression *arg2=NULL,
236 SgAsmExpression *arg3=NULL, SgAsmExpression *arg4=NULL, SgAsmExpression *arg5=NULL,
237 SgAsmExpression *arg6=NULL) const;
238
240 M68kFamily get_family() const { return family; }
241
242private:
243 void init();
244};
245
246} // namespace
247} // namespace
248} // namespace
249
250#ifdef ROSE_ENABLE_BOOST_SERIALIZATION
251BOOST_CLASS_EXPORT_KEY(Rose::BinaryAnalysis::Disassembler::M68k);
252#endif
253
254#endif
255#endif
Virtual base class for instruction disassemblers.
Interface for disassembling a single instruction.
Disassembler for Motorola M68k-based instruction set architectures.
SgAsmRegisterReferenceExpression * makeProgramCounter(State &) const
Create a reference to the program counter register.
virtual SgAsmInstruction * disassembleOne(const MemoryMap::Ptr &, Address start_va, AddressSet *successors=nullptr) override
This is the lowest level disassembly function and is implemented in the architecture-specific subclas...
SgAsmExpression * makeAddress(State &, SgAsmExpression *expr) const
Converts a memory-reference expression to an address.
ExpressionPair makeOffsetWidthPair(State &, unsigned extension_word) const
Create an offset width pair from an extension word.
SgAsmRegisterNames * makeRegistersFromMask(State &, unsigned mask, M68kDataFormat fmt, bool reverse=false) const
Create a list of data and/or address registers.
virtual Base::Ptr clone() const override
Creates a new copy of a disassembler.
SgAsmRegisterReferenceExpression * makeMacRegister(State &, M68kMacRegister) const
Create a MAC register reference expression.
virtual SgAsmInstruction * makeUnknownInstruction(const Exception &) override
Makes an unknown instruction from an exception.
SgAsmIntegerValueExpression * makeImmediateValue(State &, M68kDataFormat fmt, unsigned value) const
Create an integer expression from a specified value.
SgAsmM68kInstruction * makeInstruction(State &, M68kInstructionKind, M68kDataFormat, SgAsmExpression *arg0=NULL, SgAsmExpression *arg1=NULL, SgAsmExpression *arg2=NULL, SgAsmExpression *arg3=NULL, SgAsmExpression *arg4=NULL, SgAsmExpression *arg5=NULL, SgAsmExpression *arg6=NULL) const
Build an instruction.
SgAsmMemoryReferenceExpression * makeAddressRegisterPostIncrement(State &, unsigned regnum, M68kDataFormat fmt) const
Make a memory reference expression using an address register in post-increment mode.
SgAsmRegisterNames * makeFPRegistersFromMask(State &, unsigned mask, M68kDataFormat fmt, bool reverse=false) const
Create a list of floating-point data registers.
SgAsmRegisterReferenceExpression * makeFPRegister(State &, unsigned regnum) const
Create a floating point register.
SgAsmExpression * makeEffectiveAddress(State &, unsigned modreg, M68kDataFormat fmt, size_t ext_offset) const
Create an expression for m68k "<ea>x" or "<ea>y".
SgAsmRegisterReferenceExpression * makeDataRegister(State &, unsigned regnum, M68kDataFormat, size_t bit_offset=0) const
Create a data register reference expression.
static Ptr instance(const Architecture::BaseConstPtr &, M68kFamily)
Allocating constructor for a specific family.
SgAsmRegisterReferenceExpression * makeMacAccumulatorRegister(State &, unsigned accumIndex) const
Create a MAC accumulator register.
uint16_t instructionWord(State &, size_t n) const
Return the Nth instruction word.
size_t extensionWordsUsed(State &) const
Returns number of instruction words referenced so far in the current instruction.
SgAsmType * makeType(State &, M68kDataFormat) const
Create a ROSE data type for m68k data format.
SgAsmIntegerValueExpression * makeImmediateExtension(State &, M68kDataFormat fmt, size_t ext_word_idx) const
Create an integer expression from extension words.
SgAsmRegisterReferenceExpression * makeStatusRegister(State &) const
Create a reference to the status register.
void insert_idis(Decoder *)
Insert an instruction-specific disassembler.
SgAsmRegisterReferenceExpression * makeColdFireControlRegister(State &, unsigned regnum) const
Create control register for ColdFire cpu.
SgAsmExpression * makeEffectiveAddress(State &, unsigned mode, unsigned reg, M68kDataFormat fmt, size_t ext_offset) const
Create an expression for m68k "<ea>x" or "<ea>y".
void start_instruction(State &state, const MemoryMap::Ptr &map, Address start_va) const
Called by disassembleOne() to initialize the disassembler state for the next instruction.
SgAsmRegisterReferenceExpression * makeRegister(RegisterDescriptor) const
Generic ways to make a register.
SgAsmRegisterReferenceExpression * makeConditionCodeRegister(State &) const
Create a reference to the condition code register.
SgAsmMemoryReferenceExpression * makeAddressRegisterPreDecrement(State &, unsigned regnum, M68kDataFormat fmt) const
Make a memory reference expression using an address register in pre-decrement mode.
SgAsmRegisterReferenceExpression * makeDataAddressRegister(State &, unsigned regnum, M68kDataFormat fmt, size_t bit_offset=0) const
Create either a data or address register reference expression.
SgAsmRegisterReferenceExpression * makeAddressRegister(State &, unsigned regnum, M68kDataFormat, size_t bit_offset=0) const
Create an address register reference expression.
Decoder * find_idis(uint16_t *insn_bytes, size_t nbytes) const
Find an instruction-specific disassembler.
M68kFamily get_family() const
Returns ISA family specified in constructor.
Describes (part of) a physical CPU register.
Describes a pattern of bits in a finite number of words.
Definition BitPattern.h:56
Reference-counting intrusive smart pointer.
Base class for expressions.
Base class for machine instructions.
Base class for integer values.
Reference to memory locations.
An ordered list of registers.
Base class for references to a machine register.
Base class for binary types.
std::shared_ptr< const Base > BaseConstPtr
Reference counted pointer for Architecture::Base.
std::uint64_t Address
Address.
Definition Address.h:11
The ROSE library.
MemoryMap::Ptr map
Map from which to read instruction words.
size_t niwords_used
High water number of instruction words used by instructionWord().
size_t niwords
Number of instruction words read.