ROSE  0.11.98.0
Disassembler/M68k.h
1 /* Disassembly specific to Motorola architectures */
2 #ifndef ROSE_BinaryAnalysis_Disassembler_M68k_H
3 #define ROSE_BinaryAnalysis_Disassembler_M68k_H
4 #include <featureTests.h>
5 #ifdef ROSE_ENABLE_BINARY_ANALYSIS
6 #include <Rose/BinaryAnalysis/Disassembler/Base.h>
7 
8 #include <Rose/BinaryAnalysis/InstructionEnumsM68k.h>
9 #include "BitPattern.h"
10 
11 #include <boost/serialization/access.hpp>
12 #include <boost/serialization/base_object.hpp>
13 #include <boost/serialization/export.hpp>
14 #include <boost/serialization/split_member.hpp>
15 
16 namespace Rose {
17 namespace BinaryAnalysis {
18 namespace Disassembler {
19 
21 class M68k: public Base {
22 public:
24  using Ptr = M68kPtr;
25 
26  // State mutated during the call to disassembleOne. Used internally.
27  struct State: boost::noncopyable { // noncopyable is so we don't accidentally pass it by value
29  rose_addr_t insn_va;
30  uint16_t iwords[11];
31  size_t niwords;
32  size_t niwords_used;
34  State()
35  : insn_va(0), niwords(0), niwords_used(0) {}
36  };
37 
38 public:
47  class Decoder {
48  public:
49  Decoder(const std::string &name, unsigned family, const BitPattern<uint16_t> &pattern)
50  : name(name), family(family), pattern(pattern) {}
51  virtual ~Decoder() {}
52  std::string name; // for debugging; same as class name but without the "M68k_" prefix
53  unsigned family; // bitmask of M68kFamily bits
54  BitPattern<uint16_t> pattern; // bits that match
55  typedef M68k D;
56  virtual SgAsmM68kInstruction *operator()(State&, const D *d, unsigned w0) = 0;
57  };
58 
59 private:
60  M68kFamily family;
62  // The instruction disassembly table is an array indexed by the high-order nybble of the first 16-bit word of the
63  // instruction's pattern, the so-called "operator" bits. Since most instruction disassembler have invariant operator
64  // bits, we can divide the table into 16 entries for these invariant bits, and another entry (index 16) for the cases
65  // with a variable operator byte. Each of these 17 buckets is an unordered list of instruction disassemblers whose
66  // patterns we attempt to match one at a time (the insertion function checks that there are no ambiguities).
67  typedef std::list<Decoder*> IdisList;
68  typedef std::vector<IdisList> IdisTable;
69  IdisTable idis_table;
70 
71 #ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
72 private:
73  friend class boost::serialization::access;
74 
75  template<class S>
76  void serialize_common(S &s, const unsigned /*version*/) {
77  s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Base);
78  s & BOOST_SERIALIZATION_NVP(family);
79  //s & idis_table; -- not saved
80  }
81 
82  template<class S>
83  void save(S &s, const unsigned version) const {
84  serialize_common(s, version);
85  }
86 
87  template<class S>
88  void load(S &s, const unsigned version) {
89  serialize_common(s, version);
90  init();
91  }
92 
93  BOOST_SERIALIZATION_SPLIT_MEMBER();
94 #endif
95 
96 protected:
97  // undocumented constructor for serialization. The init() will be called by the serialization.
98  M68k();
99 
100  explicit M68k(M68kFamily family);
101 
102 public:
111  static Ptr instance(M68kFamily);
112 
113  virtual Base::Ptr clone() const override;
114  virtual bool canDisassemble(SgAsmGenericHeader*) const override;
115  virtual SgAsmInstruction *disassembleOne(const MemoryMap::Ptr&, rose_addr_t start_va,
116  AddressSet *successors = nullptr) override;
117  virtual SgAsmInstruction *makeUnknownInstruction(const Exception&) override;
118  virtual Unparser::BasePtr unparser() const override;
119 
120  typedef std::pair<SgAsmExpression*, SgAsmExpression*> ExpressionPair;
121 
125  Decoder* find_idis(uint16_t *insn_bytes, size_t nbytes) const;
126 
129  void insert_idis(Decoder*);
130 
132  void start_instruction(State &state, const MemoryMap::Ptr &map, rose_addr_t start_va) const{
133  state.map = map;
134  state.insn_va = start_va;
135  state.niwords = 0;
136  memset(state.iwords, 0, sizeof state.iwords);
137  state.niwords_used = 0;
138  }
139 
141  uint16_t instructionWord(State&, size_t n) const;
142 
144  size_t extensionWordsUsed(State&) const;
145 
147  SgAsmType *makeType(State&, M68kDataFormat) const;
148 
150  SgAsmRegisterReferenceExpression *makeDataRegister(State&, unsigned regnum, M68kDataFormat, size_t bit_offset=0) const;
151 
153  SgAsmRegisterReferenceExpression *makeAddressRegister(State&, unsigned regnum, M68kDataFormat, size_t bit_offset=0) const;
154 
157  SgAsmMemoryReferenceExpression *makeAddressRegisterPreDecrement(State&, unsigned regnum, M68kDataFormat fmt) const;
158 
161  SgAsmMemoryReferenceExpression *makeAddressRegisterPostIncrement(State&, unsigned regnum, M68kDataFormat fmt) const;
162 
165  SgAsmRegisterReferenceExpression *makeDataAddressRegister(State&, unsigned regnum, M68kDataFormat fmt,
166  size_t bit_offset=0) const;
167 
173  SgAsmRegisterNames *makeRegistersFromMask(State&, unsigned mask, M68kDataFormat fmt, bool reverse=false) const;
174 
180  SgAsmRegisterNames *makeFPRegistersFromMask(State&, unsigned mask, M68kDataFormat fmt, bool reverse=false) const;
181 
184 
187 
189  SgAsmRegisterReferenceExpression* makeColdFireControlRegister(State&, unsigned regnum) const;
190 
193 
195  SgAsmRegisterReferenceExpression *makeMacRegister(State&, M68kMacRegister) const;
196 
198  SgAsmRegisterReferenceExpression *makeMacAccumulatorRegister(State&, unsigned accumIndex) const;
199 
203  SgAsmRegisterReferenceExpression *makeFPRegister(State&, unsigned regnum) const;
204 
207 
209  SgAsmIntegerValueExpression *makeImmediateValue(State&, M68kDataFormat fmt, unsigned value) const;
210 
212  SgAsmIntegerValueExpression *makeImmediateExtension(State&, M68kDataFormat fmt, size_t ext_word_idx) const;
213 
220  SgAsmExpression *makeEffectiveAddress(State&, unsigned modreg, M68kDataFormat fmt, size_t ext_offset) const;
221  SgAsmExpression *makeEffectiveAddress(State&, unsigned mode, unsigned reg, M68kDataFormat fmt, size_t ext_offset) const;
227  SgAsmExpression *makeAddress(State&, SgAsmExpression *expr) const;
228 
231  ExpressionPair makeOffsetWidthPair(State&, unsigned extension_word) const;
232 
234  SgAsmM68kInstruction *makeInstruction(State&, M68kInstructionKind, const std::string &mnemonic,
235  SgAsmExpression *arg0=NULL, SgAsmExpression *arg1=NULL, SgAsmExpression *arg2=NULL,
236  SgAsmExpression *arg3=NULL, SgAsmExpression *arg4=NULL, SgAsmExpression *arg5=NULL,
237  SgAsmExpression *arg6=NULL) const;
238 
240  M68kFamily get_family() const { return family; }
241 
242 private:
243  void init();
244 };
245 
246 } // namespace
247 } // namespace
248 } // namespace
249 
250 #ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
251 BOOST_CLASS_EXPORT_KEY(Rose::BinaryAnalysis::Disassembler::M68k);
252 #endif
253 
254 #endif
255 #endif
size_t niwords
Number of instruction words read.
SgAsmM68kInstruction * makeInstruction(State &, M68kInstructionKind, const std::string &mnemonic, SgAsmExpression *arg0=NULL, SgAsmExpression *arg1=NULL, SgAsmExpression *arg2=NULL, SgAsmExpression *arg3=NULL, SgAsmExpression *arg4=NULL, SgAsmExpression *arg5=NULL, SgAsmExpression *arg6=NULL) const
Build an instruction.
SgAsmRegisterReferenceExpression * makeStatusRegister(State &) const
Create a reference to the status register.
Base class for references to a machine register.
SgAsmRegisterReferenceExpression * makeConditionCodeRegister(State &) const
Create a reference to the condition code register.
SgAsmIntegerValueExpression * makeImmediateValue(State &, M68kDataFormat fmt, unsigned value) const
Create an integer expression from a specified value.
void start_instruction(State &state, const MemoryMap::Ptr &map, rose_addr_t start_va) const
Called by disassembleOne() to initialize the disassembler state for the next instruction.
Base class for machine instructions.
SgAsmRegisterReferenceExpression * makeProgramCounter(State &) const
Create a reference to the program counter register.
static Ptr instance(M68kFamily)
Allocating constructor for a specific family.
SgAsmRegisterNames * makeFPRegistersFromMask(State &, unsigned mask, M68kDataFormat fmt, bool reverse=false) const
Create a list of floating-point data registers.
SgAsmIntegerValueExpression * makeImmediateExtension(State &, M68kDataFormat fmt, size_t ext_word_idx) const
Create an integer expression from extension words.
SgAsmRegisterReferenceExpression * makeRegister(RegisterDescriptor) const
Generic ways to make a register.
void insert_idis(Decoder *)
Insert an instruction-specific disassembler.
uint16_t instructionWord(State &, size_t n) const
Return the Nth instruction word.
Main namespace for the ROSE library.
rose_addr_t insn_va
Address of instruction.
SgAsmRegisterReferenceExpression * makeColdFireControlRegister(State &, unsigned regnum) const
Create control register for ColdFire cpu.
SgAsmType * makeType(State &, M68kDataFormat) const
Create a ROSE data type for m68k data format.
M68kFamily get_family() const
Returns ISA family specified in constructor.
Interface for disassembling a single instruction.
MemoryMapPtr Ptr
Reference counting pointer.
Definition: MemoryMap.h:115
Reference to memory locations.
virtual Base::Ptr clone() const override
Creates a new copy of a disassembler.
An ordered list of registers.
Base class for container file headers.
Base class for integer values.
Describes (part of) a physical CPU register.
SgAsmExpression * makeAddress(State &, SgAsmExpression *expr) const
Converts a memory-reference expression to an address.
SgAsmRegisterReferenceExpression * makeAddressRegister(State &, unsigned regnum, M68kDataFormat, size_t bit_offset=0) const
Create an address register reference expression.
SgAsmRegisterReferenceExpression * makeDataAddressRegister(State &, unsigned regnum, M68kDataFormat fmt, size_t bit_offset=0) const
Create either a data or address register reference expression.
SgAsmRegisterReferenceExpression * makeDataRegister(State &, unsigned regnum, M68kDataFormat, size_t bit_offset=0) const
Create a data register reference expression.
SgAsmRegisterNames * makeRegistersFromMask(State &, unsigned mask, M68kDataFormat fmt, bool reverse=false) const
Create a list of data and/or address registers.
size_t extensionWordsUsed(State &) const
Returns number of instruction words referenced so far in the current instruction. ...
Disassembler for Motorola M68k-based instruction set architectures.
M68kPtr Ptr
Reference counted pointer.
Base class for expressions.
Binary analysis.
ExpressionPair makeOffsetWidthPair(State &, unsigned extension_word) const
Create an offset width pair from an extension word.
SgAsmMemoryReferenceExpression * makeAddressRegisterPostIncrement(State &, unsigned regnum, M68kDataFormat fmt) const
Make a memory reference expression using an address register in post-increment mode.
Sawyer::SharedPointer< M68k > M68kPtr
Reference counted pointer for Motorola M68k decoder.
Base class for binary types.
SgAsmRegisterReferenceExpression * makeMacAccumulatorRegister(State &, unsigned accumIndex) const
Create a MAC accumulator register.
virtual bool canDisassemble(SgAsmGenericHeader *) const override
Predicate determining the suitability of a disassembler for a specific file header.
virtual SgAsmInstruction * makeUnknownInstruction(const Exception &) override
Makes an unknown instruction from an exception.
SgAsmRegisterReferenceExpression * makeMacRegister(State &, M68kMacRegister) const
Create a MAC register reference expression.
SgAsmMemoryReferenceExpression * makeAddressRegisterPreDecrement(State &, unsigned regnum, M68kDataFormat fmt) const
Make a memory reference expression using an address register in pre-decrement mode.
MemoryMap::Ptr map
Map from which to read instruction words.
Decoder * find_idis(uint16_t *insn_bytes, size_t nbytes) const
Find an instruction-specific disassembler.
Base class for all ROSE exceptions.
Definition: Rose/Exception.h:9
virtual Unparser::BasePtr unparser() const override
Unparser.
SgAsmExpression * makeEffectiveAddress(State &, unsigned modreg, M68kDataFormat fmt, size_t ext_offset) const
Create an expression for m68k "x" or "y".
virtual SgAsmInstruction * disassembleOne(const MemoryMap::Ptr &, rose_addr_t start_va, AddressSet *successors=nullptr) override
This is the lowest level disassembly function and is implemented in the architecture-specific subclas...
Virtual base class for instruction disassemblers.
size_t niwords_used
High water number of instruction words used by instructionWord().
SgAsmRegisterReferenceExpression * makeFPRegister(State &, unsigned regnum) const
Create a floating point register.