ROSE 0.11.145.192
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Disassembler for Motorola M68k-based instruction set architectures.
Definition at line 22 of file Disassembler/M68k.h.
#include <Rose/BinaryAnalysis/Disassembler/M68k.h>
Classes | |
class | Decoder |
Interface for disassembling a single instruction. More... | |
struct | State |
Public Types | |
using | Ptr = M68kPtr |
Reference counted pointer. | |
typedef std::pair< SgAsmExpression *, SgAsmExpression * > | ExpressionPair |
Public Types inherited from Rose::BinaryAnalysis::Disassembler::Base | |
using | Ptr = BasePtr |
Public Member Functions | |
virtual Base::Ptr | clone () const override |
Creates a new copy of a disassembler. | |
virtual SgAsmInstruction * | disassembleOne (const MemoryMap::Ptr &, rose_addr_t start_va, AddressSet *successors=nullptr) override |
This is the lowest level disassembly function and is implemented in the architecture-specific subclasses. | |
virtual SgAsmInstruction * | makeUnknownInstruction (const Exception &) override |
Makes an unknown instruction from an exception. | |
Decoder * | find_idis (uint16_t *insn_bytes, size_t nbytes) const |
Find an instruction-specific disassembler. | |
void | insert_idis (Decoder *) |
Insert an instruction-specific disassembler. | |
void | start_instruction (State &state, const MemoryMap::Ptr &map, rose_addr_t start_va) const |
Called by disassembleOne() to initialize the disassembler state for the next instruction. | |
uint16_t | instructionWord (State &, size_t n) const |
Return the Nth instruction word. | |
size_t | extensionWordsUsed (State &) const |
Returns number of instruction words referenced so far in the current instruction. | |
SgAsmType * | makeType (State &, M68kDataFormat) const |
Create a ROSE data type for m68k data format. | |
SgAsmRegisterReferenceExpression * | makeDataRegister (State &, unsigned regnum, M68kDataFormat, size_t bit_offset=0) const |
Create a data register reference expression. | |
SgAsmRegisterReferenceExpression * | makeAddressRegister (State &, unsigned regnum, M68kDataFormat, size_t bit_offset=0) const |
Create an address register reference expression. | |
SgAsmMemoryReferenceExpression * | makeAddressRegisterPreDecrement (State &, unsigned regnum, M68kDataFormat fmt) const |
Make a memory reference expression using an address register in pre-decrement mode. | |
SgAsmMemoryReferenceExpression * | makeAddressRegisterPostIncrement (State &, unsigned regnum, M68kDataFormat fmt) const |
Make a memory reference expression using an address register in post-increment mode. | |
SgAsmRegisterReferenceExpression * | makeDataAddressRegister (State &, unsigned regnum, M68kDataFormat fmt, size_t bit_offset=0) const |
Create either a data or address register reference expression. | |
SgAsmRegisterNames * | makeRegistersFromMask (State &, unsigned mask, M68kDataFormat fmt, bool reverse=false) const |
Create a list of data and/or address registers. | |
SgAsmRegisterNames * | makeFPRegistersFromMask (State &, unsigned mask, M68kDataFormat fmt, bool reverse=false) const |
Create a list of floating-point data registers. | |
SgAsmRegisterReferenceExpression * | makeStatusRegister (State &) const |
Create a reference to the status register. | |
SgAsmRegisterReferenceExpression * | makeConditionCodeRegister (State &) const |
Create a reference to the condition code register. | |
SgAsmRegisterReferenceExpression * | makeColdFireControlRegister (State &, unsigned regnum) const |
Create control register for ColdFire cpu. | |
SgAsmRegisterReferenceExpression * | makeProgramCounter (State &) const |
Create a reference to the program counter register. | |
SgAsmRegisterReferenceExpression * | makeMacRegister (State &, M68kMacRegister) const |
Create a MAC register reference expression. | |
SgAsmRegisterReferenceExpression * | makeMacAccumulatorRegister (State &, unsigned accumIndex) const |
Create a MAC accumulator register. | |
SgAsmRegisterReferenceExpression * | makeFPRegister (State &, unsigned regnum) const |
Create a floating point register. | |
SgAsmRegisterReferenceExpression * | makeRegister (RegisterDescriptor) const |
Generic ways to make a register. | |
SgAsmIntegerValueExpression * | makeImmediateValue (State &, M68kDataFormat fmt, unsigned value) const |
Create an integer expression from a specified value. | |
SgAsmIntegerValueExpression * | makeImmediateExtension (State &, M68kDataFormat fmt, size_t ext_word_idx) const |
Create an integer expression from extension words. | |
SgAsmExpression * | makeAddress (State &, SgAsmExpression *expr) const |
Converts a memory-reference expression to an address. | |
ExpressionPair | makeOffsetWidthPair (State &, unsigned extension_word) const |
Create an offset width pair from an extension word. | |
SgAsmM68kInstruction * | makeInstruction (State &, M68kInstructionKind, M68kDataFormat, SgAsmExpression *arg0=NULL, SgAsmExpression *arg1=NULL, SgAsmExpression *arg2=NULL, SgAsmExpression *arg3=NULL, SgAsmExpression *arg4=NULL, SgAsmExpression *arg5=NULL, SgAsmExpression *arg6=NULL) const |
Build an instruction. | |
M68kFamily | get_family () const |
Returns ISA family specified in constructor. | |
SgAsmExpression * | makeEffectiveAddress (State &, unsigned modreg, M68kDataFormat fmt, size_t ext_offset) const |
Create an expression for m68k "<ea>x" or "<ea>y". | |
SgAsmExpression * | makeEffectiveAddress (State &, unsigned mode, unsigned reg, M68kDataFormat fmt, size_t ext_offset) const |
Create an expression for m68k "<ea>x" or "<ea>y". | |
Public Member Functions inherited from Rose::BinaryAnalysis::Disassembler::Base | |
Architecture::BaseConstPtr | architecture () const |
Property: Architecture. | |
virtual const std::string & | name () const |
Property: Name. | |
virtual size_t | bytesPerWord () const |
Property: Bytes per word for the architecture. | |
virtual ByteOrder::Endianness | byteOrder () const |
Property: Byte order of memory. | |
Unparser::BasePtr | unparser () const |
Unparser. | |
size_t | instructionAlignment () const |
Property: Instruction alignment requirement. | |
SgAsmInstruction * | disassembleOne (const unsigned char *buf, rose_addr_t buf_va, size_t buf_size, rose_addr_t start_va, AddressSet *successors=NULL) |
Similar in functionality to the disassembleOne method that takes a MemoryMap argument, except the content buffer is mapped 1:1 to virtual memory beginning at the specified address. | |
void | mark_referenced_instructions (SgAsmInterpretation *, const MemoryMap::Ptr &, const InstructionMap &) |
Marks parts of the file that correspond to instructions as having been referenced. | |
AddressSet | get_block_successors (const InstructionMap &, bool &complete) |
Calculates the successor addresses of a basic block and adds them to a successors set. | |
size_t | wordSizeBytes () const |
RegisterDictionaryPtr | registerDictionary () const |
virtual RegisterDescriptor | instructionPointerRegister () const |
virtual RegisterDescriptor | stackPointerRegister () const |
virtual RegisterDescriptor | stackFrameRegister () const |
virtual RegisterDescriptor | stackSegmentRegister () const |
virtual RegisterDescriptor | callReturnRegister () const |
Public Member Functions inherited from Sawyer::SharedObject | |
SharedObject () | |
Default constructor. | |
SharedObject (const SharedObject &) | |
Copy constructor. | |
virtual | ~SharedObject () |
Virtual destructor. | |
SharedObject & | operator= (const SharedObject &) |
Assignment. | |
Static Public Member Functions | |
static Ptr | instance (const Architecture::BaseConstPtr &, M68kFamily) |
Allocating constructor for a specific family. | |
Static Public Member Functions inherited from Rose::BinaryAnalysis::Disassembler::Base | |
static SgAsmInstruction * | find_instruction_containing (const InstructionMap &insns, rose_addr_t va) |
Finds the highest-address instruction that contains the byte at the specified virtual address. | |
Protected Member Functions | |
M68k (const Architecture::BaseConstPtr &) | |
M68k (const Architecture::BaseConstPtr &, M68kFamily family) | |
Protected Member Functions inherited from Rose::BinaryAnalysis::Disassembler::Base | |
Base (const Architecture::BaseConstPtr &) | |
Additional Inherited Members | |
Protected Attributes inherited from Rose::BinaryAnalysis::Disassembler::Base | |
RegisterDescriptor | REG_IP |
RegisterDescriptor | REG_SP |
RegisterDescriptor | REG_SS |
RegisterDescriptor | REG_SF |
RegisterDescriptor | REG_LINK |
Register descriptors initialized during construction. | |
size_t | instructionAlignment_ = 1 |
Positive alignment constraint for instruction addresses. | |
Reference counted pointer.
Definition at line 25 of file Disassembler/M68k.h.
typedef std::pair<SgAsmExpression*, SgAsmExpression*> Rose::BinaryAnalysis::Disassembler::M68k::ExpressionPair |
Definition at line 119 of file Disassembler/M68k.h.
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static |
Allocating constructor for a specific family.
The family
argument selectively activates certain features of the generic m68k disassembler. For instance, to get a disassembler specific to the FreeScale ColdFire series using "ISA_B", invoke as:
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overridevirtual |
Creates a new copy of a disassembler.
The new copy has all the same settings as the original.
Thread safety: The thread safety of this virtual method depends on the implementation in the subclass.
Implements Rose::BinaryAnalysis::Disassembler::Base.
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overridevirtual |
This is the lowest level disassembly function and is implemented in the architecture-specific subclasses.
It disassembles one instruction at the specified virtual address. The map
is a mapping from virtual addresses to buffer and enables instructions to span file segments that are mapped contiguously in virtual memory by the loader but which might not be contiguous in the file. The instruction's successor virtual addresses are added to the optional successor set (note that successors of an individual instruction can also be obtained via Architecture::Base::getSuccessors). If the instruction cannot be disassembled then an exception is thrown and the successors set is not modified.
Thread safety: The safety of this method depends on its implementation in the subclass. In any case, no other thread can be modifying the MemoryMap or successors set at the same time.
Implements Rose::BinaryAnalysis::Disassembler::Base.
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overridevirtual |
Makes an unknown instruction from an exception.
Thread safety: The safety of this method depends on its implementation in the subclass.
Implements Rose::BinaryAnalysis::Disassembler::Base.
Decoder * Rose::BinaryAnalysis::Disassembler::M68k::find_idis | ( | uint16_t * | insn_bytes, |
size_t | nbytes | ||
) | const |
Find an instruction-specific disassembler.
Using the specified instruction bits, search for and return an instruction-specific disassembler. Returns null if no appropriate disassembler can be found. Instruction-specific disassemblers know how to disassemble specific instruction types (or groups of closely related instructions).
void Rose::BinaryAnalysis::Disassembler::M68k::insert_idis | ( | Decoder * | ) |
Insert an instruction-specific disassembler.
The table must not already contain an entry that has the same mask
and match
values. The pointers are managed by the caller and must not be deleted while they are in the table.
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inline |
Called by disassembleOne() to initialize the disassembler state for the next instruction.
Definition at line 131 of file Disassembler/M68k.h.
References Rose::BinaryAnalysis::Disassembler::M68k::State::insn_va, Rose::BinaryAnalysis::Disassembler::M68k::State::iwords, Rose::BinaryAnalysis::Disassembler::M68k::State::map, Rose::BinaryAnalysis::Disassembler::M68k::State::niwords, and Rose::BinaryAnalysis::Disassembler::M68k::State::niwords_used.
SgAsmMemoryReferenceExpression * Rose::BinaryAnalysis::Disassembler::M68k::makeAddressRegisterPreDecrement | ( | State & | , |
unsigned | regnum, | ||
M68kDataFormat | fmt | ||
) | const |
Make a memory reference expression using an address register in pre-decrement mode.
The fmt
is the format of the memory reference; all 32-bits of the address register are accessed.
SgAsmMemoryReferenceExpression * Rose::BinaryAnalysis::Disassembler::M68k::makeAddressRegisterPostIncrement | ( | State & | , |
unsigned | regnum, | ||
M68kDataFormat | fmt | ||
) | const |
Make a memory reference expression using an address register in post-increment mode.
The fmt
is the format of the memory reference; all 32-bits of the address register are accessed.
SgAsmRegisterReferenceExpression * Rose::BinaryAnalysis::Disassembler::M68k::makeDataAddressRegister | ( | State & | , |
unsigned | regnum, | ||
M68kDataFormat | fmt, | ||
size_t | bit_offset = 0 |
||
) | const |
Create either a data or address register reference expression.
When regnum
is zero through seven a data register is created; when regnum
is eight through 15 an address register is created.
SgAsmRegisterNames * Rose::BinaryAnalysis::Disassembler::M68k::makeRegistersFromMask | ( | State & | , |
unsigned | mask, | ||
M68kDataFormat | fmt, | ||
bool | reverse = false |
||
) | const |
Create a list of data and/or address registers.
The bit mask indicates the registers. Starting at the least significant bit, the register are either: D0, D1, ... D7, A0, A1, ... A7 if reverse
is false, or A7, A6, ... A0, D7, D6, ... D0 if reverse
is true. The returned list has the registers in order starting at the least significant bit.
SgAsmRegisterNames * Rose::BinaryAnalysis::Disassembler::M68k::makeFPRegistersFromMask | ( | State & | , |
unsigned | mask, | ||
M68kDataFormat | fmt, | ||
bool | reverse = false |
||
) | const |
Create a list of floating-point data registers.
The bit mask indicates the registers. Starting at the least significant bit, the registers are either: FP0 through FP7 if reverse
is false, or FP7 through FP0 if reverse
is true. The returned list has the registers in order starting at the least significant bit.
SgAsmRegisterReferenceExpression * Rose::BinaryAnalysis::Disassembler::M68k::makeConditionCodeRegister | ( | State & | ) | const |
Create a reference to the condition code register.
This is the low-order 8 bits of the status register.
SgAsmRegisterReferenceExpression * Rose::BinaryAnalysis::Disassembler::M68k::makeMacAccumulatorRegister | ( | State & | , |
unsigned | accumIndex | ||
) | const |
Create a MAC accumulator register.
These are ACC0 through ACC3, 32-bit integers.
SgAsmRegisterReferenceExpression * Rose::BinaryAnalysis::Disassembler::M68k::makeFPRegister | ( | State & | , |
unsigned | regnum | ||
) | const |
Create a floating point register.
Floating point registers are different sizes on different platforms. For example, the M68040 has 80-bit registers that can store 96-bit extended-precision real values (16-bits of which are zero), but the follow on FreeScale ColdFire processors have only 64-bit registers that hold double-precision real values.
SgAsmExpression * Rose::BinaryAnalysis::Disassembler::M68k::makeEffectiveAddress | ( | State & | , |
unsigned | modreg, | ||
M68kDataFormat | fmt, | ||
size_t | ext_offset | ||
) | const |
Create an expression for m68k "<ea>x" or "<ea>y".
The modreg
is a six-bit value whose high-order three bits are the addressing mode and whose low-order three bits are (usually) a register number. The return value has a type of the specified data format. The ext_offset
indicates how many instruction extension words have already been consumed.
SgAsmExpression * Rose::BinaryAnalysis::Disassembler::M68k::makeEffectiveAddress | ( | State & | , |
unsigned | mode, | ||
unsigned | reg, | ||
M68kDataFormat | fmt, | ||
size_t | ext_offset | ||
) | const |
Create an expression for m68k "<ea>x" or "<ea>y".
The modreg
is a six-bit value whose high-order three bits are the addressing mode and whose low-order three bits are (usually) a register number. The return value has a type of the specified data format. The ext_offset
indicates how many instruction extension words have already been consumed.
SgAsmExpression * Rose::BinaryAnalysis::Disassembler::M68k::makeAddress | ( | State & | , |
SgAsmExpression * | expr | ||
) | const |
Converts a memory-reference expression to an address.
This is used for things like the JSR instruction that takes an effective address that's a memory reference, and converts it to just an address. It also rewrites PC-relative addresses since the PC is constant.
ExpressionPair Rose::BinaryAnalysis::Disassembler::M68k::makeOffsetWidthPair | ( | State & | , |
unsigned | extension_word | ||
) | const |
Create an offset width pair from an extension word.
The extension word contains an offset and width expression each of which is either a 5-bit unsigned integer or a data register number. This is used by various bit field instructions.
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inline |
Returns ISA family specified in constructor.
Definition at line 239 of file Disassembler/M68k.h.